4A, 100V, 0.60 Ohm, P-Channel Power MOSFET

4A, 100V, 0.60 Ohm, P-Channel Power MOSFET This P-Channel enhancement mode silicon gate power field effect transistor is designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring h

高可靠性功率 MOSFET

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P-CHANNEL ENHANCEMENT MODE HIGH VOLTAGE POWER MOSFETS

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P-CHANNEL ENHANCEMENT MODE HIGH VOLTAGE POWER MOSFETS

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4A, 100V, 0.60 Ohm, P-Channel Power MOSFET

MOSFETs and JFETs

High-Voltage Current-Mode PWM Controller

General Description The Supertex HV9123 is a Switch Mode Power Supply (SMPS) controller subsystem that can start and run directly from almost any DC input, from a 12V battery to a rectified and filtered 240VAC line. It contains all the elements required to build a single-switch converter except

High-Voltage Current-Mode PWM Controller

General Description The Supertex HV9123 is a Switch Mode Power Supply (SMPS) controller subsystem that can start and run directly from almost any DC input, from a 12V battery to a rectified and filtered 240VAC line. It contains all the elements required to build a single-switch converter except

High-Voltage Current-Mode PWM Controller

General Description The Supertex HV9123 is a Switch Mode Power Supply (SMPS) controller subsystem that can start and run directly from almost any DC input, from a 12V battery to a rectified and filtered 240VAC line. It contains all the elements required to build a single-switch converter except

High-Voltage Current-Mode PWM Controller

General Description The Supertex HV9123 is a Switch Mode Power Supply (SMPS) controller subsystem that can start and run directly from almost any DC input, from a 12V battery to a rectified and filtered 240VAC line. It contains all the elements required to build a single-switch converter except

1:10 LVCMOS FANOUT BUFFER

The MPC9120 is a 1:10 LVCMOS fanout buffer targeted to support Intel based Pentium II microprocessor chip sets. The device features 10 low skew outputs optimized to drive the clock inputs of standard unbuffered SO–DIMM SDRAM modules. Standard unbuffered SO–DIMM SDRAM modules require two clocks pe