3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

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3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4μ W typ

3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

文件：66.55 Kbytes Page：6 Pages

3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4μ W typ

3.3-V 20-bit Flip Flops with 3-state Outputs

Description The HD74ALVCH16721’s twenty flip flops are edge triggered D-type flip flops with qualified clock storage. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current

3.3-V 20-bit Flip Flops with 3-state Outputs

Description The HD74ALVCH16721’s twenty flip flops are edge triggered D-type flip flops with qualified clock storage. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current