HIGH PERFORMANCE CMOS BUS INTERFACE REGISTER

DESCRIPTION: The IDT54/74FCT800 series is built using an advanced dual metal CMOS technology. The IDT54/74FCT820 series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses ca

HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER

FEATURES: • A and C grades • Low input and output leakage ≤1μA (max.) • CMOS power levels • True TTL input and output compatibility: – VOH = 3.3V (typ.) – VOL = 0.3V (typ.) • High Drive outputs (-15mA IOH, 48mA IOL) • Meets or exceeds JEDEC standard 18 specifications • Power off disable o

HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER

FEATURES: • A and C grades • Low input and output leakage ≤1μA (max.) • CMOS power levels • True TTL input and output compatibility: – VOH = 3.3V (typ.) – VOL = 0.3V (typ.) • High Drive outputs (-15mA IOH, 48mA IOL) • Meets or exceeds JEDEC standard 18 specifications • Power off disable o

HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER

FEATURES: • A and C grades • Low input and output leakage ≤1μA (max.) • CMOS power levels • True TTL input and output compatibility: – VOH = 3.3V (typ.) – VOL = 0.3V (typ.) • High Drive outputs (-15mA IOH, 48mA IOL) • Meets or exceeds JEDEC standard 18 specifications • Power off disable o

HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER

FEATURES: • A and C grades • Low input and output leakage ≤1μA (max.) • CMOS power levels • True TTL input and output compatibility: – VOH = 3.3V (typ.) – VOL = 0.3V (typ.) • High Drive outputs (-15mA IOH, 48mA IOL) • Meets or exceeds JEDEC standard 18 specifications • Power off disable o

HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER

FEATURES: • A and C grades • Low input and output leakage ≤1μA (max.) • CMOS power levels • True TTL input and output compatibility: – VOH = 3.3V (typ.) – VOL = 0.3V (typ.) • High Drive outputs (-15mA IOH, 48mA IOL) • Meets or exceeds JEDEC standard 18 specifications • Power off disable o