CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a