BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

DESCRIPTION: The IDT71B74 is a high-speed cache address comparator subsystem consisting of a 65,536-bit static RAM organized as 8K x 8 and an 8-bit comparator. A single IDT71B74 can map 8K cache words into a 2 megabyte address space by using the 21 bits of address organized with the 13 LSBs for t

BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

DESCRIPTION: The IDT71B74 is a high-speed cache address comparator subsystem consisting of a 65,536-bit static RAM organized as 8K x 8 and an 8-bit comparator. A single IDT71B74 can map 8K cache words into a 2 megabyte address space by using the 21 bits of address organized with the 13 LSBs for t

BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

DESCRIPTION: The IDT71B74 is a high-speed cache address comparator subsystem consisting of a 65,536-bit static RAM organized as 8K x 8 and an 8-bit comparator. A single IDT71B74 can map 8K cache words into a 2 megabyte address space by using the 21 bits of address organized with the 13 LSBs for t

BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

DESCRIPTION: The IDT71B74 is a high-speed cache address comparator subsystem consisting of a 65,536-bit static RAM organized as 8K x 8 and an 8-bit comparator. A single IDT71B74 can map 8K cache words into a 2 megabyte address space by using the 21 bits of address organized with the 13 LSBs for t

BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

DESCRIPTION: The IDT71B74 is a high-speed cache address comparator subsystem consisting of a 65,536-bit static RAM organized as 8K x 8 and an 8-bit comparator. A single IDT71B74 can map 8K cache words into a 2 megabyte address space by using the 21 bits of address organized with the 13 LSBs for t

BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

DESCRIPTION: The IDT71B74 is a high-speed cache address comparator subsystem consisting of a 65,536-bit static RAM organized as 8K x 8 and an 8-bit comparator. A single IDT71B74 can map 8K cache words into a 2 megabyte address space by using the 21 bits of address organized with the 13 LSBs for t

BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

DESCRIPTION: The IDT71B74 is a high-speed cache address comparator subsystem consisting of a 65,536-bit static RAM organized as 8K x 8 and an 8-bit comparator. A single IDT71B74 can map 8K cache words into a 2 megabyte address space by using the 21 bits of address organized with the 13 LSBs for t

BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

DESCRIPTION: The IDT71B74 is a high-speed cache address comparator subsystem consisting of a 65,536-bit static RAM organized as 8K x 8 and an 8-bit comparator. A single IDT71B74 can map 8K cache words into a 2 megabyte address space by using the 21 bits of address organized with the 13 LSBs for t

BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

DESCRIPTION: The IDT71B74 is a high-speed cache address comparator subsystem consisting of a 65,536-bit static RAM organized as 8K x 8 and an 8-bit comparator. A single IDT71B74 can map 8K cache words into a 2 megabyte address space by using the 21 bits of address organized with the 13 LSBs for t

BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

DESCRIPTION: The IDT71B74 is a high-speed cache address comparator subsystem consisting of a 65,536-bit static RAM organized as 8K x 8 and an 8-bit comparator. A single IDT71B74 can map 8K cache words into a 2 megabyte address space by using the 21 bits of address organized with the 13 LSBs for t

BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

DESCRIPTION: The IDT71B74 is a high-speed cache address comparator subsystem consisting of a 65,536-bit static RAM organized as 8K x 8 and an 8-bit comparator. A single IDT71B74 can map 8K cache words into a 2 megabyte address space by using the 21 bits of address organized with the 13 LSBs for t