HIGH-PERFORMANCE CMOS BUS INTERFACE LATCHES

DESCRIPTION: The IDT54/74FCT800 series is built using an advanced dual metal CMOS technology. The IDT54/74FCT840 series bus interface latches are designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/ data paths or buses carry

HIGH-PERFORMANCE CMOS BUS INTERFACE LATCHES

DESCRIPTION: The IDT54/74FCT800 series is built using an advanced dual metal CMOS technology. The IDT54/74FCT840 series bus interface latches are designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/ data paths or buses carry

10-BIT LATCHES WITH 3-STATE OUTPUTS

Function, Pinout, and Drive Compatible With FCT, F, and AM29841 Logic Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics Ioff Supports Partial-Power-Down Mode Operation Matched Rise and Fall Tim

10-Bit Latch

文件：84.15 Kbytes Page：8 Pages

10-Bit Latch

文件：84.15 Kbytes Page：8 Pages

10-BIT LATCHES WITH 3-STATE OUTPUTS

文件：316.65 Kbytes Page：12 Pages

10-BIT LATCHES WITH 3-STATE OUTPUTS

文件：316.65 Kbytes Page：12 Pages