PLL BUILDING BLOCK

Description The ICS673-01 is a low cost, high performance Phase Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO), and two output buffers. One output buffer is a divide by two of t

PLL Building Block

Description The ICS673-01 is a low cost, high performance Phase Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO), and two output buffers. One output buffer is a divide by two of

PLL Building Block

Description The ICS673-01 is a low cost, high performance Phase Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO), and two output buffers. One output buffer is a divide by two of

PLL Building Block

Description The ICS673-01 is a low cost, high performance Phase Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO), and two output buffers. One output buffer is a divide by two of

PLL Building Block

Description The ICS673-01 is a low cost, high performance Phase Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO), and two output buffers. One output buffer is a divide by two of

PLL Building Block

Description The ICS673-01 is a low cost, high performance Phase Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO), and two output buffers. One output buffer is a divide by two of

PLL Building Block

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC PLL BUILDING BLOCK 16-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

IC PLL BUILDING BLOCK 16-SOIC

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC PLL BUILDING BLOCK 16-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

IC PLL BUILDING BLOCK 16-SOIC

RECTIFIERS ASSEMBLIES

Single Phase Bridges, 1.5Amp, Standard and Fast Recovery

Lead (Pb) Free Product - RoHS Compliant

Features • package: white SMT package, colorless clear resin • feature of the device: radiation direction parallel to PCB, so an ideal LED for coupling in light guides • wavelength: 471 nm (blue),532 nm (true green) • viewing angle: Lambertian Emitter (120°) • technology: InGaN • optical eff

Silicon PNP Epitaxial

Application • Low frequency amplifier • Complementary pair with 2SC1213 and 2SC1213A

8-Bit A/D Converter

GENERAL DESCRIPTION The AD673 is a complete 8-bit successive approximation analog-to-digital converter consisting of a DAC, voltage reference, clock, comparator, successive approximation register (SAR) and 3-state output buffers—all fabricated on a single chip. No external components are required

Axial Lead and Cartridge Fuses - Glass Body

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