FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER

Description The ICS342 is a low cost, dual-output, field programmable clock synthesizer. The ICS342 can generate two output frequencies from 250 kHz to 200 MHz, using up to two independently configurable PLLs. The outputs may employ Spread Spectrum techniques to reduce system electro-magnetic int

Field Programmable Dual Output SS VersaClock Synthesizer

The 342 is a low cost, dual-output, field programmable clock synthesizer. The 342 can generate two output frequencies from 250 kHz to 200 MHz, using up to two independently configurable PLLs. The outputs may employ Spread Spectrum techniques to reduce system electro-magnetic interference (EMI). Usin • 8-pin SOIC package (Pb-free)\n• Highly accurate frequency generation\n• M/N Multiplier PLL: M = 1...2048, N = 1...1024\n• Output clock frequencies up to 200 MHz\n• Two ROM locations for frequency and spread selection\n• Spread spectrum capability for lower system EMI;

FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER

文件：128.71 Kbytes Page：9 Pages

FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER

Description The ICS342 is a low cost, dual-output, field programmable clock synthesizer. The ICS342 can generate two output frequencies from 250 kHz to 200 MHz, using up to two independently configurable PLLs. The outputs may employ Spread Spectrum techniques to reduce system electro-magnetic int

FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER

Description The ICS342 is a low cost, dual-output, field programmable clock synthesizer. The ICS342 can generate two output frequencies from 250 kHz to 200 MHz, using up to two independently configurable PLLs. The outputs may employ Spread Spectrum techniques to reduce system electro-magnetic int

FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER

Description The ICS342 is a low cost, dual-output, field programmable clock synthesizer. The ICS342 can generate two output frequencies from 250 kHz to 200 MHz, using up to two independently configurable PLLs. The outputs may employ Spread Spectrum techniques to reduce system electro-magnetic int

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC VERSACLOCK SYNTHESIZER 8-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC VERSACLOCK SYNTHESIZER 8-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

3-Terminal Positive Regulators

文件：138.76 Kbytes Page：6 Pages

Single with Shutdown/Dual/Quad General Purpose, 2.7V, Rail-to-Rail Output, 125째C, Operational Amplifiers

文件：694.92 Kbytes Page：17 Pages

Single with Shutdown/Dual/Quad General Purpose, 2.7V, Rail-to-Rail Output, 125째C, Operational Amplifiers

文件：694.92 Kbytes Page：17 Pages

Single with Shutdown/Dual/Quad General Purpose, 2.7V, Rail-to-Rail Output, 125째C, Operational Amplifiers

文件：694.92 Kbytes Page：17 Pages

Single with Shutdown/Dual/Quad General Purpose, 2.7V, Rail-to-Rail Output, 125째C, Operational Amplifiers

文件：694.92 Kbytes Page：17 Pages