丝印代码：1524AMLF；Dual Output Phase Controlled SSTL_3/PECL Clock Generator

Features • Wide input frequency range • 8 kHz to 100 MHz • 250 MHz balanced PECL differential outputs • 150 MHz single-ended SSTL_3 clock outputs • Dynamic Phase Adjust (DPA) for DPACLK outputs • Software controlled phase adjustment • 360o Adjustment down to 1/64 clock increments • Externa

封装/外壳：24-SOIC（0.295"，7.50mm 宽） 包装：管件 描述：IC CLK GEN SSTL_3/PECL 24-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

Stereo-tone/volume control circuit

GENERAL DESCRIPTION The device is designed as an active stereo-tone/volume control for car radios, TV receivers and mains-fed equipment. It includes functions for bass and treble control, volume control with built-in contour (can be switched off) and balance. All these functions can be control

Stereo-tone/volume control circuit

GENERAL DESCRIPTION The device is designed as an active stereo-tone/volume control for car radios, TV receivers and mains-fed equipment. It includes functions for bass and treble control, volume control with built-in contour (can be switched off) and balance. All these functions can be control

N - CHANNEL POWER MOS FET ARRAY SWITCHING TYPE?

SEMICONDUCTOR SELECTION GUIDE Microcomputer IC Memory Semi-Custom IC Particular Purpose IC General Purpose Linear IC Transistor / Diode / Thyristor Microwave Device / Consumer Use High Frequency Device Optical Device Packages Index (Quick Reference by Type N

N - CHANNEL POWER MOS FET ARRAY SWITCHING TYPE?

SEMICONDUCTOR SELECTION GUIDE Microcomputer IC Memory Semi-Custom IC Particular Purpose IC General Purpose Linear IC Transistor / Diode / Thyristor Microwave Device / Consumer Use High Frequency Device Optical Device Packages Index (Quick Reference by Type N

Advanced Regulating Pulse Width Modulators

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