Dual D-type Flip-Flops (with Preset and Clear)

Description The flip-flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive going transition to the clock pulse. Preset and clear are independent of the clock and accomplished by a

General-Purpose Logics-HD/RD74HC Series

Dual D-type Flip-Flops (with Preset and Clear)

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Dual D Flip-Flop with Set and Reset

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS The MC74HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two D flip−flops with indi

Dual D Flip-Flop with Set and Reset

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS The MC74HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two D flip−flops with indi

Dual D Flip-Flop with Set and Reset

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS The MC74HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two D flip−flops with indi

Dual D Flip-Flop with Set and Reset

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS The MC74HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two D flip−flops with indi

Dual D Flip-Flop with Set and Reset

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS The MC74HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two D flip−flops with indi