2-wide 2-input, 2-wide 3-input AND-OR-INVERT Gate

Features • High Speed Operation: tpd = 10.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 1 µA max (Ta = 25°C)

2-wide 2-input, 2-wide 3-input AND-OR-INVERT Gate

Features • High Speed Operation: tpd = 10.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 1 µA max (Ta = 25°C)

2-wide 2-input, 2-wide 3-input AND-OR-INVERT Gate

2-wide 2-input, 2-wide 3-input AND-OR-INVERT Gate

Features • High Speed Operation: tpd = 10.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 1 µA max (Ta = 25°C)

2-wide 2-input, 2-wide 3-input AND-OR-INVERT Gate

Features • High Speed Operation: tpd = 10.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 1 µA max (Ta = 25°C)

2-wide 2-input, 2-wide 3-input AND-OR-INVERT Gate

Features • High Speed Operation: tpd = 10.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 1 µA max (Ta = 25°C)

2-wide 2-input, 2-wide 3-input AND-OR-INVERT Gate

Features • High Speed Operation: tpd = 10.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 1 µA max (Ta = 25°C)

DUAL 2 WIDE 2 INPUT AND/OR INVERT GATE

DESCRIPTION The M74HC51 is an high speed CMOS DUAL 2 WIDE 2 INPUT AND/OR INVERT GATE fabricated with silicon gate C2MOS technology. It contains a 2-WIDE 2-INPUT AND/OR INVERT GATE and a 2-WIDE 3-INPUT AND/OR INVERT GATE. The internal circuit is composed of 3 stages (2 INPUT) or 5 stages (3 I