型号 功能描述 生产厂家 企业 LOGO 操作
HD74HC112

Dual J-K Flip-Flops (with Preset and Clear)

Description Each flip-flop has independent J, K, preset, clear and clock inputs and Q and Qoutputs. This device is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock and accomplished by a low logi

HitachiHitachi Semiconductor

日立日立公司

HD74HC112

Dual J-K Flip-Flops (with Preset and Clear)

文件:102.89 Kbytes Page:7 Pages

RENESAS

瑞萨

HD74HC112

Dual J-K Flip-Flops (with Preset and Clear)

HitachiHitachi Semiconductor

日立日立公司

HD74HC112

Standard IC>General-Purpose Logics>HD74HC Series

RENESAS

瑞萨

Dual 4-bit Binary Counters

RENESAS

瑞萨

Dual J-K Flip-Flops (with Preset and Clear)

文件:102.89 Kbytes Page:7 Pages

RENESAS

瑞萨

Dual J-K Flip-Flops (with Preset and Clear)

文件:102.89 Kbytes Page:7 Pages

RENESAS

瑞萨

Dual JK flip-flop with set and reset; negative-edge trigger

GENERAL DESCRIPTION The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Asynchronous set and reset • Output capability: standard • ICC category: flip

Philips

飞利浦

Dual JK flip-flop with set and reset; negative-edge trigger

1. General description The 74HC112; 74HCT112 is a dual negative-edge triggered JK flip-flop. It features individual J and K inputs, clock (nCP) set (nSD) and reset (nRD) inputs. It also has complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate indepen

NEXPERIA

安世

High Speed CMOS Logic

Features Output Drive Capability: 10 LSTTL Loads Bus Drive Capability: 15 LSTTL Loads Low Input Current: 1μA Outputs directly interface CMOS, NMOS and TTL Operating Voltage Range: 2V to 6V CMOS High Noise Immunity Function compatible with 74LS112.

SS

Dual JK flip-flop with set and reset; negative-edge trigger

GENERAL DESCRIPTION The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Asynchronous set and reset • Output capability: standard • ICC category: flip

Philips

飞利浦

High Speed CMOS Logic

文件:683.61 Kbytes Page:6 Pages

SS

HD74HC112产品属性

  • 类型

    描述

  • 型号

    HD74HC112

  • 制造商

    Renesas Electronics Corporation

  • 功能描述

    Flip Flop JK-Type Neg-Edge 2-Element 16-Pin SOP

更新时间:2025-12-30 16:07:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
HITACHI
23+
SSOP
52433
##公司主营品牌长期供应100%原装现货可含税提供技术
HITACHI
20+
SSOP
2960
诚信交易大量库存现货
HITACHI
25+
SSOP
86910
全新原装进口现货价格优惠 本公司承诺原装正品假一赔
HIT
99+
SOP-16
430
原装现货海量库存欢迎咨询
HITACHI
2025+
SOP-16
3565
全新原厂原装产品、公司现货销售
RENESAS
22+
DIP16
8000
原装正品支持实单
曰立
2023+
TSSOP
50000
原装现货
HITACHI
22+
TSSOP
20000
公司只做原装 品质保障
HITACHI/日立
23+
DIP16
6500
专注配单,只做原装进口现货
RENESAS/瑞萨
2223+
TSSOP
26800
只做原装正品假一赔十为客户做到零风险

HD74HC112数据表相关新闻