| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
HD74AC74 | Dual D-Type Positive Edge-Triggered Flip-Flop Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir | HITACHIHitachi Semiconductor 日立日立公司 | ||
HD74AC74 | Dual D-Type Positive Edge-Triggered Flip-Flop Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir | RENESAS 瑞萨 | ||
HD74AC74 | Standard IC>General-Purpose Logics>HD74AC Series | RENESAS 瑞萨 | ||
Dual D-Type Positive Edge-Triggered Flip-Flop Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir | RENESAS 瑞萨 | |||
Dual D-Type Positive Edge-Triggered Flip-Flop Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir | RENESAS 瑞萨 | |||
Dual D-Type Positive Edge-Triggered Flip-Flop Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir | RENESAS 瑞萨 | |||
Dual D-Type Positive Edge-Triggered Flip-Flop Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir | RENESAS 瑞萨 | |||
General-Purpose Logics-HD74AC Series | RENESAS 瑞萨 | |||
General-Purpose Logics-HD74AC Series | RENESAS 瑞萨 | |||
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 文件:97.56 Kbytes Page:11 Pages | STMICROELECTRONICS 意法半导体 | |||
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 文件:97.56 Kbytes Page:11 Pages | STMICROELECTRONICS 意法半导体 | |||
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 文件:97.56 Kbytes Page:11 Pages | STMICROELECTRONICS 意法半导体 | |||
Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered 文件:36.2 Kbytes Page:8 Pages | TI 德州仪器 | |||
Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered 文件:36.2 Kbytes Page:8 Pages | TI 德州仪器 |
HD74AC74产品属性
- 类型
描述
- Family.:
HD74AC Series
- Function Gr1:
Latch/Flip-Flop/Register
- Function Gr2:
D type FlipFlop
- Function:
Dual D-type Flip-Flops with Preset and Clear
- Number of Channel:
2
- Topa[Tjopa] (degC) min.:
-40
- Topa[Tjopa] (degC) max.:
85
- Vcc (V) min.:
2
- Vcc (V) max.:
6.0
- Iout (mA):
±24
- Propagation Delay (ns) max.:
10.5
- Package Type:
SOP
- Production Status:
Non-promotion
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
HITACHI |
20+ |
SOP-14 |
2960 |
诚信交易大量库存现货 |
|||
HIT |
24+ |
SOP14 |
20000 |
全新原厂原装,进口正品现货,正规渠道可含税!! |
|||
HITACHI/日立 |
2450+ |
SOP(5.2) |
9850 |
只做原厂原装正品现货或订货假一赔十! |
|||
HIT |
25+ |
SOP |
3200 |
全新原装、诚信经营、公司现货销售 |
|||
HIT |
2015+ |
SOP14 |
19889 |
一级代理原装现货,特价热卖! |
|||
HIT |
2025+ |
SOP14 |
4165 |
全新原厂原装产品、公司现货销售 |
|||
HITACHI |
01+ |
SOP14 |
2000 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
HITACHI/日立 |
2223+ |
SOP14 |
26800 |
只做原装正品假一赔十为客户做到零风险 |
|||
HITACHI/日立 |
26+ |
SOP14 |
2000 |
专注全新正品,优势现货供应 |
|||
HITACHI |
SOP14 |
8560 |
一级代理 原装正品假一罚十价格优势长期供货 |
HD74AC74芯片相关品牌
HD74AC74规格书下载地址
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