位置：首页 > IC中文资料第6263页 > HD74AC74
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
HD74AC74 | Dual D-Type Positive Edge-Triggered Flip-Flop Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir | HITACHIHitachi Semiconductor 日立日立公司 |   | |
HD74AC74 | Dual D-Type Positive Edge-Triggered Flip-Flop Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir | RENESAS 瑞萨 | | |
HD74AC74 | Standard IC>General-Purpose Logics>HD74AC Series | RENESAS 瑞萨 | | |
Dual D-Type Positive Edge-Triggered Flip-Flop Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir | RENESAS 瑞萨 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir | RENESAS 瑞萨 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir | RENESAS 瑞萨 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir | RENESAS 瑞萨 | | ||
General-Purpose Logics-HD74AC Series | RENESAS 瑞萨 | | ||
General-Purpose Logics-HD74AC Series | RENESAS 瑞萨 | | ||
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 文件：97.56 Kbytes Page：11 Pages | STMICROELECTRONICS 意法半导体 | | ||
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 文件：97.56 Kbytes Page：11 Pages | STMICROELECTRONICS 意法半导体 | | ||
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 文件：97.56 Kbytes Page：11 Pages | STMICROELECTRONICS 意法半导体 | | ||
Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered 文件：36.2 Kbytes Page：8 Pages | TI 德州仪器 | | ||
Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered 文件：36.2 Kbytes Page：8 Pages | TI 德州仪器 | |
HD74AC74产品属性
- 类型
描述
- 型号
HD74AC74
- 制造商
RENESAS
- 制造商全称
Renesas Technology Corp
- 功能描述
Dual D-Type Positive Edge-Triggered Flip-Flop
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
HIT |
25+ |
SOP |
3200 |
全新原装、诚信经营、公司现货销售 |
|||
HITACHI |
23+ |
SOP5.2 |
52663 |
##公司主营品牌长期供应100%原装现货可含税提供技术 |
|||
2023+ |
DIP |
3000 |
进口原装现货 |
||||
HITACHI |
24+ |
SOP5.2 |
9860 |
原装现货/放心购买 |
|||
HIT |
2015+ |
SOP14 |
19889 |
一级代理原装现货,特价热卖! |
|||
HIT |
2025+ |
SOP14 |
4165 |
全新原厂原装产品、公司现货销售 |
|||
HITACHI/日立 |
2223+ |
SOP14 |
26800 |
只做原装正品假一赔十为客户做到零风险 |
|||
HITACHI |
22+ |
SOP14 |
8000 |
原装正品支持实单 |
|||
HIT |
23+ |
SOP |
7000 |
绝对全新原装!100%保质量特价!请放心订购! |
|||
NEC |
23+ |
SOP |
20000 |
全新原装假一赔十 |
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2019-8-24
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