位置：首页 > IC中文资料第653页 > 74AC74
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74AC74 | Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and i | FAIRCHILD 仙童半导体 |   | |
74AC74 | Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at | ONSEMI 安森美半导体 | | |
74AC74 | Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is | ONSEMI 安森美半导体 | | |
74AC74 | Dual D-Type Positive Edge-Triggered Flip-Flop | ONSEMI 安森美半导体 | | |
74AC74 | DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 文件：97.56 Kbytes Page：11 Pages | STMICROELECTRONICS 意法半导体 | | |
74AC74 | Dual D-Type Positive Edge-Triggered Flip-Flop 文件：111.59 Kbytes Page：10 Pages | FAIRCHILD 仙童半导体 | | |
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and i | FAIRCHILD 仙童半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is | ONSEMI 安森美半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is | ONSEMI 安森美半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is | ONSEMI 安森美半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and i | FAIRCHILD 仙童半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and i | FAIRCHILD 仙童半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is | ONSEMI 安森美半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is | ONSEMI 安森美半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is | ONSEMI 安森美半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and i | FAIRCHILD 仙童半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop 文件：111.59 Kbytes Page：10 Pages | FAIRCHILD 仙童半导体 | | ||
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR | STMICROELECTRONICS 意法半导体 | | ||
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 文件：97.56 Kbytes Page：11 Pages | STMICROELECTRONICS 意法半导体 | | ||
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 文件：97.56 Kbytes Page：11 Pages | STMICROELECTRONICS 意法半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop 文件：111.59 Kbytes Page：10 Pages | FAIRCHILD 仙童半导体 | | ||
封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 功能：设置（预设）和复位 包装：管件 描述：IC FF D-TYPE DUAL 1BIT 14TSSOP 集成电路（IC） 触发器 | ONSEMI 安森美半导体 | | ||
封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 功能：设置（预设）和复位 包装：管件 描述：IC FF D-TYPE DUAL 1BIT 14TSSOP 集成电路（IC） 触发器 | ONSEMI 安森美半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop 文件：111.59 Kbytes Page：10 Pages | FAIRCHILD 仙童半导体 | | ||
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 文件：89.89 Kbytes Page：12 Pages | STMICROELECTRONICS 意法半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop 文件：111.59 Kbytes Page：10 Pages | FAIRCHILD 仙童半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop 文件：111.59 Kbytes Page：10 Pages | FAIRCHILD 仙童半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop 文件：111.59 Kbytes Page：10 Pages | FAIRCHILD 仙童半导体 | | ||
Dual D-Type Positive Edge-Triggered Flip-Flop 文件：111.59 Kbytes Page：10 Pages | FAIRCHILD 仙童半导体 | | ||
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 文件：89.89 Kbytes Page：12 Pages | STMICROELECTRONICS 意法半导体 | | ||
Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered 文件：36.2 Kbytes Page：8 Pages | TI 德州仪器 | | ||
Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered 文件：36.2 Kbytes Page：8 Pages | TI 德州仪器 | |
74AC74产品属性
- 类型
描述
- 型号
74AC74
- 功能描述
触发器 RO 512-74AC74SC
- RoHS
否
- 制造商
Texas Instruments
- 电路数量
2
- 逻辑系列
SN74
- 逻辑类型
D-Type Flip-Flop
- 极性
Inverting, Non-Inverting
- 输入类型
CMOS
- 传播延迟时间
4.4 ns
- 高电平输出电流
- 16 mA
- 低电平输出电流
16 mA
- 电源电压-最大
5.5 V
- 最大工作温度
+ 85 C
- 安装风格
SMD/SMT
- 封装/箱体
X2SON-8
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
FAIRCHILD |
2016+ |
TSSOP14 |
3500 |
只做原装,假一罚十,公司可开17%增值税发票! |
|||
NSC |
23+ |
SOP |
20000 |
全新原装假一赔十 |
|||
NSC |
24+/25+ |
500 |
原装正品现货库存价优 |
||||
TI/TEXAS |
26+ |
3.9mm |
8931 |
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订 |
|||
MOT/FA |
24+ |
SMD |
25843 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
|||
FAIRCHILD/仙童 |
25+ |
SOIC-14 |
20000 |
原装 |
|||
NS |
18+ |
SOP5.2 |
85600 |
保证进口原装可开17%增值税发票 |
|||
FAIRCHILD/仙童 |
24+ |
DIP-14 |
36 |
大批量供应优势库存热卖 |
|||
FAIRCHILD/仙童 |
2450+ |
DIP |
8850 |
只做原装正品假一赔十为客户做到零风险!! |
|||
Fairchild(飞兆/仙童) |
23+ |
NA |
20094 |
正纳10年以上分销经验原装进口正品做服务做口碑有支持 |
74AC74规格书下载地址
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DdatasheetPDF页码索引
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