Octal 3-State Noninverting Transparent Latch(High-Performance Silicon-Gate CMOS)

The SL74HC573 is identical in pinout to the LS/ALS573. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When

Octal 3-State Noninverting Transparent Latch(High-Performance Silicon-Gate CMOS)

丝印代码：HC573M；CDx4HC573 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • 2-V to 6-V VCC operation • Wide operating temp range of –55℃ to 125℃ • 3-state outputs directly drive bus lines • Balanced propagation delays and transition times • Bus driver outputs drive up to 15 LS-TTL loads • Significant power reduction compared to LS-TTL Logic ICs 2 De

丝印代码：HC573M；CDx4HC573 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • 2-V to 6-V VCC operation • Wide operating temp range of –55℃ to 125℃ • 3-state outputs directly drive bus lines • Balanced propagation delays and transition times • Bus driver outputs drive up to 15 LS-TTL loads • Significant power reduction compared to LS-TTL Logic ICs 2 De

丝印代码：HC573M；CDx4HC573 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • 2-V to 6-V VCC operation • Wide operating temp range of –55℃ to 125℃ • 3-state outputs directly drive bus lines • Balanced propagation delays and transition times • Bus driver outputs drive up to 15 LS-TTL loads • Significant power reduction compared to LS-TTL Logic ICs 2 De

丝印代码：HC573M；CDx4HC573 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • 2-V to 6-V VCC operation • Wide operating temp range of –55℃ to 125℃ • 3-state outputs directly drive bus lines • Balanced propagation delays and transition times • Bus driver outputs drive up to 15 LS-TTL loads • Significant power reduction compared to LS-TTL Logic ICs 2 De

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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Octal D-type transparent latch with 5-volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC573A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as

Octal D-Type Latch with 3-State Outputs With 5 V?뭈olerant Inputs

The MC74LVX573 is an advanced high speed CMOS octal latch with 3−state outputs. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. This 8−bit D−type latch is controlled by a latch enable input and an output enable input. When the output enable inpu

Schottky Barrier Rectifier

Description: The NTE573 is an axial lead metal–to–silicon power diode using the Schottky Barrier principle. State–of–the–art geometry features epitaxial construction with oxide passivation and metal overlap contact. This device is ideally suited for use in low–voltage, high–frequency inverters, a

P-CHANNEL MOS FET 5-PIN 2 CIRCUITS FOR SWITCHING

P-CHANNEL MOS FET (5-PIN 2 CIRCUITS) FOR SWITCHING The µPA573T is a super-mini-mold device provided with two MOS FET circuits. It achieves high-density mounting and saves mounting costs. FEATURES • Two source common MOS FET circuits in package the same size as SC-70 • Directly driven by ICs ha

OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

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