High Speed CMOS Logic Octal Transparent Latch, Three-State Output

Description The Harris CD74HC373, CD74HCT373, CD54HC573, CD74HC573, and CD74HCT573 are high speed Octal Transparent Latches manufactured with silicon gate CMOS technology. They possess the low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LSTTL devices

丝印代码：HC573M；CDx4HC573 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • 2-V to 6-V VCC operation • Wide operating temp range of –55℃ to 125℃ • 3-state outputs directly drive bus lines • Balanced propagation delays and transition times • Bus driver outputs drive up to 15 LS-TTL loads • Significant power reduction compared to LS-TTL Logic ICs 2 De

OCTAL TRANSPARENT D-TYPE LATCHES

文件：901.88 Kbytes Page：15 Pages

High Speed CMOS Logic Octal Transparent Latch, Three-State Output

文件：53.42 Kbytes Page：9 Pages

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC OCT D-TYPE LATCH 3ST 20SOIC 集成电路（IC） 锁存器

丝印代码：HC573M；CDx4HC573 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • 2-V to 6-V VCC operation • Wide operating temp range of –55℃ to 125℃ • 3-state outputs directly drive bus lines • Balanced propagation delays and transition times • Bus driver outputs drive up to 15 LS-TTL loads • Significant power reduction compared to LS-TTL Logic ICs 2 De

丝印代码：HC573M；CDx4HC573 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • 2-V to 6-V VCC operation • Wide operating temp range of –55℃ to 125℃ • 3-state outputs directly drive bus lines • Balanced propagation delays and transition times • Bus driver outputs drive up to 15 LS-TTL loads • Significant power reduction compared to LS-TTL Logic ICs 2 De

丝印代码：HC573M；CDx4HC573 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • 2-V to 6-V VCC operation • Wide operating temp range of –55℃ to 125℃ • 3-state outputs directly drive bus lines • Balanced propagation delays and transition times • Bus driver outputs drive up to 15 LS-TTL loads • Significant power reduction compared to LS-TTL Logic ICs 2 De

OCTAL TRANSPARENT D-TYPE LATCHES

文件：901.88 Kbytes Page：15 Pages

High Speed CMOS Logic Octal Transparent Latch, Three-State Output

文件：53.42 Kbytes Page：9 Pages

OCTAL TRANSPARENT D-TYPE LATCHES

文件：901.88 Kbytes Page：15 Pages

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：IC OCT D-TYPE LATCH 3ST 20SOIC 集成电路（IC） 锁存器

OCTAL TRANSPARENT D-TYPE LATCHES

文件：901.88 Kbytes Page：15 Pages

Octal D-type transparent latch; 3-state

GENERAL DESCRIPTION The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inputs and outputs on opposite sides of package allowing easy interface with microp

Octal 3-State Noninverting Transparent Latch(High-Performance Silicon-Gate CMOS)

The SL74HC573 is identical in pinout to the LS/ALS573. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When

Octal D-type transparent latch 3-state

GENERAL DESCRIPTION The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inputs and outputs on opposite sides of package allowing easy interface with microp

Octal D-type transparent latch; 3-state

1. General description The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will

Octal 3-State Noninverting Transparent Latch

文件：121.56 Kbytes Page：7 Pages