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H5PS1G63价格

参考价格：￥18.2543

型号：H5PS1G63KFR-S5C 品牌：SK Hynix 备注：这里有H5PS1G63多少钱，2026年最近7天走势，今日出价，今日竞价，H5PS1G63批发/采购报价，H5PS1G63行情走势销售排行榜，H5PS1G63报价。

型号	功能描述	生产厂家企业	LOGO
H5PS1G63EFR	1Gb(64Mx16) DDR2 SDRAM Description Device Features & Ordering Information Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface •8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Sou	Hynix 海力士	Hynix
H5PS1G63EFR	1Gb DDR2 SDRAM Description Device Features & Ordering Information Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-d	Hynix 海力士	Hynix
H5PS1G63EFR-20L	1Gb(64Mx16) DDR2 SDRAM Description Device Features & Ordering Information Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface •8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Sou	Hynix 海力士	Hynix
H5PS1G63EFR-25C	1Gb(64Mx16) DDR2 SDRAM Description Device Features & Ordering Information Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface •8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Sou	Hynix 海力士	Hynix
H5PS1G63EFR-C4I	1Gb DDR2 SDRAM Description Device Features & Ordering Information Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface •8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Sou	Hynix 海力士	Hynix
H5PS1G63EFR-E3C	1Gb DDR2 SDRAM Description Device Features & Ordering Information Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface •8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Sou	Hynix 海力士	Hynix
H5PS1G63EFR-G7Q	1Gb DDR2 SDRAM Description Device Features & Ordering Information Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface •8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Sou	Hynix 海力士	Hynix
H5PS1G63EFR-S5P	1Gb DDR2 SDRAM Description Device Features & Ordering Information Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface •8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Sou	Hynix 海力士	Hynix
H5PS1G63EFR-S6J	1Gb DDR2 SDRAM Description Device Features & Ordering Information Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface •8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Sou	Hynix 海力士	Hynix
H5PS1G63EFR-Y5L	1Gb DDR2 SDRAM Description Device Features & Ordering Information Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface •8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Sou	Hynix 海力士	Hynix
H5PS1G63JFR	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRC4C	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRC4I	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRC4J	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRC4L	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRE3C	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRE3I	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRE3J	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRE3L	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRG7C	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRG7I	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRG7J	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRG7L	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRS5C	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRS5I	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRS5J	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRS5L	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRS6C	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRS6I	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRS6J	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRS6L	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRY5C	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRY5I	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRY5J	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFRY5L	1Gb DDR2 SDRAM Key Features • VDD = 1.8 +/- 0.1V • VDDQ = 1.8 +/- 0.1V • All inputs and outputs are compatible with SSTL_18 interface • 8 banks • Fully differential clock inputs (CK, /CK) operation • Double data rate interface • Source synchronous-data transaction aligned to bidirectional data strobe (DQS	Hynix 海力士	Hynix
H5PS1G63JFR-S5C	海力士原装现货DDR 文件：993.533 Kbytes Page：12 Pages	Hynix 海力士 PDF上传者：中天科工半导体（深圳）有限公司	Hynix
H5PS1G63JFR-S5C	海力士原装现货DDR 文件：993.533 Kbytes Page：12 Pages	Hynix 海力士 PDF上传者：中天科工半导体（深圳）有限公司	Hynix
H5PS1G63JFR-S5C	海力士原装现货DDR 文件：993.533 Kbytes Page：12 Pages	Hynix 海力士 PDF上传者：中天科工半导体（深圳）有限公司	Hynix
H5PS1G63EFR-20L	1Gb DDR2 SDRAM	Hynix 海力士	Hynix
H5PS1G63EFR-C4I	1Gb DDR2 SDRAM	Hynix 海力士	Hynix
H5PS1G63JFR	1Gb DDR2 SDRAM	Hynix 海力士	Hynix

H5PS1G63产品属性

类型
描述
型号
H5PS1G63
制造商
HYNIX
制造商全称
Hynix Semiconductor
功能描述
1Gb DDR2 SDRAM

H5PS1G63供应商更多...

更新时间：2026-1-5 16:49:00

IC供应商	芯片型号	品牌	批号	封装	库存	备注	价格
深圳市中飞凌科技有限公司	H5PS1G63EFR-G7C	SAMSUNG	26+	FBGA	360000	原装现货	询价
深圳市富芯乐电子科技有限公司	H5PS1G63EFR-Y5I	HYNIX/海力士	24+	BGA	8000	全新原装现货特价销售,欢迎来电查询	询价
深圳市坤融电子科技有限公司	H5PS1G63EFR-S6C	HYNIX	2025+	BGA	3500	原装进口价格优请找坤融电子!	询价
深圳市科恒伟业电子有限公司	H5PS1G63EFR-S6C	HYNIX	2430+	BGA	8540	只做原装正品假一赔十为客户做到零风险!!	询价
深圳市昌和盛利电子有限公司	H5PS1G63EFR-S6C	HYNIX原装正品专卖价	NEW	BGA	18076	全新原装正品,价格优势,长期供应,量大可订	询价
上海鑫科润电子科技有限公司	H5PS1G63EFR-Y5C	HYNIX	14+	BGA	9860	大量原装进口现货,一手货源,一站式服务,可开17%增	询价
京海半导体(深圳)有限公司	H5PS1G63EFR-Y5I	HYNIX/海力士	23+	FBGA	98900	原厂原装正品现货!!	询价
深圳市澳亿芯电子科技有限公司	H5PS1G63EFR	HYNIX/海力士	23+	BGA	98900	原厂原装正品现货!!	询价
标准国际(香港)有限公司	H5PS1G63EFR-S6C	HYNIX	25+		122	全新原装!优势库存热卖中!	询价
深圳市向鸿伟业电子有限公司	H5PS1G63EFR-Y5J-C	SK Hynix	25+	BGA	15973	原装现货只做自己现货	询价

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深圳飞弛宏科技有限公司是一家专业集成电路及电子零配件服务型企业。成立于2012年，是电子元器件找货专家，强大的供应商数据库，整合全球优质资源，多名经验丰富的元器件采购尽最大的可能帮助您找到您想要的元件。全球1500多家代理商及独立分销商，1000多万条库存，链接您的需求，优化您的渠道，更有代理商清库特价货源和OE
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H5PS1G63价格

H5PS1G63产品属性

H5PS1G63供应商更多...

H5PS1G63芯片相关品牌

H5PS1G63规格书下载地址

H5PS1G63参数引脚图相关

H5PS1G63数据表相关新闻

H5S-YB2-X原装特价现货出售

H5PS1G63JFR-S5C原装现货

H5TC4G63CFR-PBA SKHYNIX 芯立源电子

H5MS2G62AFR-J3M

H5MS2G62

H5MS2G62AFR-E3M

DdatasheetPDF页码索引