型号 功能描述 生产厂家 企业 LOGO 操作

Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs

General Description This device contains two independent negative-edge-trig gered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the tra

Fairchild

仙童半导体

Dual J-K Negative-edge-triggered Flip-Flops(with Preset and Clear)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

HitachiHitachi Semiconductor

日立日立公司

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

The SN54 /74LS112A dual JKflip-flop features individual J, K, clock, and asynchronousset and clear inputs to each flip-flop. When the clock goes HIGH,the inputs are enabled and data will be accepted. The logic level of the Jand K inputs may be allowed to change when the clock pulse is HIGH and the

Motorola

摩托罗拉

Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs

General Description This device contains two independent negative-edge-trig gered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the tra

Fairchild

仙童半导体

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件:300.4 Kbytes Page:9 Pages

TI

德州仪器

更新时间:2025-12-28 10:31:01
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
三凌
QQ咨询
DIP16
847
全新原装 研究所指定供货商
TI
SOP
650
正品原装--自家现货-实单可谈
24+
5000
公司存货
MXIC
23+24
TSOP
27960
原装现货.优势热卖.终端BOM表可配单
TI/德州仪器
24+
SOCI-16
9600
原装现货,优势供应,支持实单!
TI
22+
SOIC-16
1000
全新原装现货!自家库存!
TI
24+
3.9mm
123
只做原装,欢迎询价,量大价优
TI/德州仪器
25+
SOCI-16
65428
百分百原装现货 实单必成
FSC
22+
SO3.9mm
20000
公司只有原装 品质保证
FAIRCHILDSEMICONDUCTOR
24+
NA
80000
只做自己库存 全新原装进口正品假一赔百 可开13%增

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