型号 功能描述 生产厂家 企业 LOGO 操作

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

封装/外壳:20-LCC(J 形引线) 包装:管件 描述:IC CPLD 8MC 25NS 20PLCC 集成电路(IC) CPLD(复杂可编程逻辑器件)

ETC

知名厂家

封装/外壳:20-LCC(J 形引线) 包装:管件 描述:IC CPLD 8MC 25NS 20PLCC 集成电路(IC) CPLD(复杂可编程逻辑器件)

ETC

知名厂家

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

IC CPLD 8MC 25NS 20PLCC

Lattice

莱迪思

IC CPLD 8MC 25NS 20DIP

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

IC CPLD 8MC 25NS 20DIP

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

GAL16V8D-25L产品属性

  • 类型

    描述

  • 型号

    GAL16V8D-25L

  • 功能描述

    SPLD - 简单可编程逻辑器件 5V 16 I/O

  • RoHS

  • 制造商

    Texas Instruments

  • 逻辑系列

    TICPAL22V10Z

  • 大电池数量

    10

  • 最大工作频率

    66 MHz

  • 延迟时间

    25 ns

  • 工作电源电压

    4.75 V to 5.25 V

  • 电源电流

    100 uA

  • 最大工作温度

    + 75 C

  • 最小工作温度

    0 C

  • 安装风格

    Through Hole

  • 封装/箱体

    DIP-24

更新时间:2025-12-23 20:51:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
Lattice Semiconductor Corporat
23+
20-DIP
11200
主营:汽车电子,停产物料,军工IC
LATTE/莱迪斯
24+
NA/
31
优势代理渠道,原装正品,可全系列订货开增值税票
LATTICE/莱迪斯
25+
20-PDIP
996880
只做原装,欢迎来电资询
LatticeSemiconductorCorp
24+
20-PDIP
66800
原厂授权一级代理,专注汽车、医疗、工业、新能源!
LATTICE
20+
DIP20
35830
原装优势主营型号-可开原型号增税票
LATTICE
2430+
DIP20
8540
只做原装正品假一赔十为客户做到零风险!!
Lattice
2015+
SMD/DIP
19889
一级代理原装现货,特价热卖!
LATTICE/莱迪斯
24+
20-PLCC9x9
13718
只做原装 公司现货库存
LATTICE原现
25+
DIP-20
25000
全新原装现货,假一赔十
LAT
23+
23081
##公司主营品牌长期供应100%原装现货可含税提供技术

GAL16V8D-25L数据表相关新闻