型号 功能描述 生产厂家 企业 LOGO 操作
GAL16V8D-25LP

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

GAL16V8D-25LP

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

GAL16V8D-25LP

封装/外壳:20-DIP(0.300",7.62mm) 包装:托盘 描述:IC CPLD 8MC 25NS 20DIP 集成电路(IC) CPLD(复杂可编程逻辑器件)

ETC

知名厂家

GAL16V8D-25LP

IC CPLD 8MC 25NS 20DIP

Lattice

莱迪思

GAL16V8D-25LP

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

GAL16V8D-25LP

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

GAL16V8D-25LP

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

GAL16V8D-25LP

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

封装/外壳:20-DIP(0.300",7.62mm) 包装:管件 描述:IC CPLD 8MC 25NS 20DIP 集成电路(IC) CPLD(复杂可编程逻辑器件)

ETC

知名厂家

IC CPLD 8MC 25NS 20DIP

Lattice

莱迪思

IC CPLD 8MC 25NS 20DIP

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

GAL16V8D-25LP产品属性

  • 类型

    描述

  • 型号

    GAL16V8D-25LP

  • 功能描述

    SPLD - 简单可编程逻辑器件 5V 16 I/O

  • RoHS

  • 制造商

    Texas Instruments

  • 逻辑系列

    TICPAL22V10Z

  • 大电池数量

    10

  • 最大工作频率

    66 MHz

  • 延迟时间

    25 ns

  • 工作电源电压

    4.75 V to 5.25 V

  • 电源电流

    100 uA

  • 最大工作温度

    + 75 C

  • 最小工作温度

    0 C

  • 安装风格

    Through Hole

  • 封装/箱体

    DIP-24

更新时间:2025-11-18 10:08:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
LATTICE
98+
DIP-20
93
原装现货海量库存欢迎咨询
Lattice(莱迪斯)
24+
标准封装
39448
原厂渠道供应,大量现货,原型号开票。
L
24+
PDIP
200
进口原装正品优势供应
LATTICE
2021+
DIP20
9450
原装现货。
Lattice(莱迪斯)
24+
20-DIP(0.300
7311
LATTICE原现
25+
DIP-20
25000
全新原装现货,假一赔十
LATTICE
24+
DIP20
65200
一级代理/放心采购
LATTICE
16+
DIP
8800
进口原装大量现货热卖中
LATTICE/莱迪斯
25+23+
DIP20
13397
绝对原装正品全新进口深圳现货
Lattice
23+
dip20
12000
全新原装假一赔十

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