14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines

14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines Whichever is greater. Delay times referenced from input to leading edges at 25°C, 5.0V, with no load

14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines

文件：43.7 Kbytes Page：1 Pages

3.3 V 1:6 LVCMOS PLL Clock Generator

3.3 V 1:6 LVCMOS PLL Clock Generator The MPC9331 is a 3.3 V compatible, 1:6 PLL based clock generator targeted for high performance low-skew clock distribution in mid-range to high-performance telecom, networking, and computing applications. With output frequencies up to 240 MHz and output skews

DTV/SDTV Motion Co-processor

文件：474.97 Kbytes Page：31 Pages

3.3V / 2.5 Gbps InGaAs PIN-TIA Receiver

文件：112.69 Kbytes Page：2 Pages

AUDIO DIGITAL SIGNAL PROCESSOR

文件：1.4149 Mbytes Page：33 Pages

AUDIO DIGITAL SIGNAL PROCESSOR

文件：1.4149 Mbytes Page：33 Pages