3.3 V 1:6 LVCMOS PLL Clock Generator

3.3 V 1:6 LVCMOS PLL Clock Generator The MPC9331 is a 3.3 V compatible, 1:6 PLL based clock generator targeted for high performance low-skew clock distribution in mid-range to high-performance telecom, networking, and computing applications. With output frequencies up to 240 MHz and output skews

3.3 V 1:6 LVCMOS PLL Clock Generator

The MPC9331 is a 3.3 V compatible, 1:6 PLL based clock generator targeted for high performance low-skew clock distribution in mid-range to high-performance telecom, networking, and computing applications. With output frequencies up to 240 MHz and output skews less than 150 ps, the device meets

1:6 LVCMOS PLL Clock Generator

The MPC9331 is a 3.3 V compatible, 1:6 PLL based clock generator targeted for high performance low-skew clock distribution in mid-range to high-performance telecom, networking, and computing applications. With output frequencies up to 240 MHz and output skews less than 150 ps, the device meets the n 1:6 PLL based low-voltage clock generator\n3.3 V power supply\nGenerates clock signals up to 240 MHz\nMaximum output skew of 150 ps\nDifferential LVPECL reference clock input\nAlternative LVCMOS PLL reference clock input\nInternal and external PLL feedback\nSupports zero-delay operation in external ;

3.3V 1:6 LVCMOS PLL Clock Generator

封装/外壳：32-LQFP 包装：散装 描述：IC PLL CLK GENERATOR 1:6 32-LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：32-LQFP 包装：管件 描述：IC PLL CLOCK GEN 1:6 32-LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器

DTV/SDTV Motion Co-processor

文件：474.97 Kbytes Page：31 Pages

3.3V / 2.5 Gbps InGaAs PIN-TIA Receiver

文件：112.69 Kbytes Page：2 Pages

AUDIO DIGITAL SIGNAL PROCESSOR

文件：1.4149 Mbytes Page：33 Pages

AUDIO DIGITAL SIGNAL PROCESSOR

文件：1.4149 Mbytes Page：33 Pages