Horizontal Genlock, 4FSC

The EL4584 is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS compatible Pixel Clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to i

Horizontal Genlock, 4FSC

The EL4584 is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS compatible Pixel Clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to i

Horizontal Genlock, 4FSC

丝印代码：EL4584CN；Horizontal Genlock, 4FSC

The EL4584 is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS compatible Pixel Clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to i

丝印代码：EL4584CS；Horizontal Genlock, 4FSC

The EL4584 is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS compatible Pixel Clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to i

丝印代码：EL4584CSZ；Horizontal Genlock, 4FSC

The EL4584 is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS compatible Pixel Clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to i

Horizontal Genlock, 4 FSC

General Description The EL4584C is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36 MHz. In a video application this device generates a TTL/CMOS compatible Pixel Clock (Clk Out) which is a multiple of the TV Horizontal scan rat

Horizontal Genlock, 4 FSC

General Description The EL4584C is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36 MHz. In a video application this device generates a TTL/CMOS compatible Pixel Clock (Clk Out) which is a multiple of the TV Horizontal scan rat

Horizontal Genlock, 4FSC

The EL4584 is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS compatible Pixel Clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to i

Horizontal Genlock, 4FSC

The EL4584 is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS compatible Pixel Clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to i

Horizontal Genlock, 4 FSC

General Description The EL4584C is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36 MHz. In a video application this device generates a TTL/CMOS compatible Pixel Clock (Clk Out) which is a multiple of the TV Horizontal scan rat

Horizontal Genlock, 4FSC

The EL4584 is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS compatible Pixel Clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to i

Horizontal genlock, 4 F sc

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC PLL VIDEO GP 36MHZ 16-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC GENLOCK HORZ 4FSC 16-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

Horizontal Genlock/ 4FSC

Hex Schmitt trigger

Description BU4001B series ICs are 2-input positive logic NOR gates, each with four built-in circuits. A buffer achieved by an inverter added at the gate output improves the input / output propagation characteristics and minimizes variation in the propagation time caused by an increase in the loa

Hex Schmitt trigger

Description BU4001B series ICs are 2-input positive logic NOR gates, each with four built-in circuits. A buffer achieved by an inverter added at the gate output improves the input / output propagation characteristics and minimizes variation in the propagation time caused by an increase in the loa

Hex Schmitt trigger

Description BU4001B series ICs are 2-input positive logic NOR gates, each with four built-in circuits. A buffer achieved by an inverter added at the gate output improves the input / output propagation characteristics and minimizes variation in the propagation time caused by an increase in the loa

HEX SCHMMIT TRIGGER

文件：195.46 Kbytes Page：5 Pages

HEX SCHMMIT TRIGGER

文件：195.46 Kbytes Page：5 Pages