General Description

The EL4584C is a PLL (Phase Lock Loop) sub system, designed for video applications but also suitable for general purpose use up to 36 MHz. In a video application this device generates a TTL/CMOS compatible Pixel Clock (Clk Out) which is a multiple of the TV Horizontal scan rate, and phase locked to it.

Features

• 36 MHz, general purpose PLL

• 4 FSC based timing (use the EL4585 for 8 FSC)

• Compatible w/EL4583 Sync Separator

• VCXO, Xtal, or LC tank oscillator

• < 2 ns jitter (VCXO)

• User controlled PLL capture and lock

• Compatible with NTSC and PAL TV formats

• 8 pre-programmed TV scan rate clock divisors

• Selectable external divide for custom ratios

• Single 5V, low current operation

Applications

• Pixel Clock regeneration

• Video compression engine (MPEG) clock generator

• Video capture or digitization

• PIP (Picture in Picture) timing generator

• Text or graphics overlay timing