128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM WTR (Wide Temperature Range)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. It is packaged in 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (max.)

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM WTR (Wide Temperature Range)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 133MHz (max.

128M bits SDRAM WTR (Wide Temperature Range)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. It is packaged in 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (max.)

128M bits SDRAM WTR (Wide Temperature Range)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 133MHz (max.

128M bits SDRAM WTR (Wide Temperature Range)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. It is packaged in 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (max.)

128M bits SDRAM (4M words x 32 bits)

128M bits SDRAM WTR (Wide Temperature Range)

128M bits SDRAM WTR (Wide Temperature Range)

Customer Specification

Construction 1) Conductor a) Material Tinned Copper, per ASTM B-33 and CID-A-A-59551, latest revision b) Stranding Solid 2) Braid Data a) Nominal Dimensions .375 x .030 Inches b) AWG of Ends 36 c) Number of Carriers 48 d) Nominal Percent Coverage N/A e) Total Number of Ends 288 f) Approx

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