128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM WTR (Wide Temperature Range)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. It is packaged in 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (max.)

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM (4M words x 32 bits)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 90-ball FBGA, 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (ma

128M bits SDRAM WTR (Wide Temperature Range)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 133MHz (max.

128M bits SDRAM WTR (Wide Temperature Range)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. It is packaged in 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (max.)

128M bits SDRAM WTR (Wide Temperature Range)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. They are packaged in 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 133MHz (max.

128M bits SDRAM WTR (Wide Temperature Range)

Description The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock. It is packaged in 86-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 166MHz (max.)

128M bits SDRAM (4M words x 32 bits)

128M bits SDRAM WTR (Wide Temperature Range)

128M bits SDRAM WTR (Wide Temperature Range)

Customer Specification

Construction 1) Conductor a) Material Tinned Copper, per ASTM B-33 and CID-A-A-59551, latest revision b) Stranding Solid 2) Braid Data a) Nominal Dimensions .375 x .030 Inches b) AWG of Ends 36 c) Number of Carriers 48 d) Nominal Percent Coverage N/A e) Total Number of Ends 288 f) Approx

Precision Capacitance Measurement System

Features Power: 105 to 125 V and 210 to 250 V, 50 to 400 Hz, 22 W for oscillator. Dimensions: Bench: 48.3 cm H x 50.2 cm W x 28.0 cm D (19 x 19.75 x 11) Weight: 27 kg (59 lb.) net, 44 kg (96 lb.) shipping

Original Strain Relief Bushings

文件：129.02 Kbytes Page：1 Pages

Variable RF Inductor

文件：324.96 Kbytes Page：2 Pages

SCREW TERMINALS

文件：584.62 Kbytes Page：2 Pages