丝印代码：K14；DIGITAL TRANSISTOR

Features 1) Built-In Biasing Resistors, R1 = R2 = 10kΩ 2) Built-in bias resistors enable the configuration of an inverter circuit without connecting external input resistors (see inner circuit) . 3) Only the on/off conditions need to be set for operation, making the circuit design e

BIAS RESISTOR TRANSISTORS

Digital Transistor

General Purpose Transistor

General Purpose Transistor PNP Bipolar Junction Transistor with a 10 kΩ Base−Emitter Resistor

丝印代码：K14；Digital Transistors (Built-in Resistor)

Features 1) The built-in bias resistors consist of thin-film resistors with complete isolation to allow positive biasing of the input, and parasitic effects are almost completely eliminated. 2) Only the on / off conditions need to be set operation, making device design easy. 3) Higher mounting

丝印代码：K14；Digital Transistors (Built-in Resistor)

Features 1) The built-in bias resistors consist of thin-film resistors with complete isolation to allow positive biasing of the input, and parasitic effects are almost completely eliminated. 2) Only the on / off conditions need to be set operation, making device design easy. 3) Higher mounting

丝印代码：A114GS；Digital Transistors (Built-in Resistor)

Features 1) The built-in bias resistors consist of thin-film resistors with complete isolation to allow positive biasing of the input, and parasitic effects are almost completely eliminated. 2) Only the on / off conditions need to be set operation, making device design easy. 3) Higher mounting

丝印代码：K14；Digital Transistors (Built-in Resistor)

Features 1) The built-in bias resistors consist of thin-film resistors with complete isolation to allow positive biasing of the input, and parasitic effects are almost completely eliminated. 2) Only the on / off conditions need to be set operation, making device design easy. 3) Higher mounting

偏压电阻三极管

丝印代码：K14；-100mA / -50V Digital transistors (with built-in resistor)

文件：93.44 Kbytes Page：3 Pages

封装/外壳：TO-236-3，SC-59，SOT-23-3 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：TRANS PREBIAS PNP 200MW SMT3 分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置

丝印代码：K14；-100mA / -50V Digital transistors (with built-in resistor)

文件：93.44 Kbytes Page：3 Pages

丝印代码：K14；PNP -100mA -50V Digital Transistor

文件：947.96 Kbytes Page：7 Pages

-100mA / -50V Digital transistors (with built-in resistor)

文件：93.44 Kbytes Page：3 Pages

PNP -100mA -50V Digital Transistor

文件：947.96 Kbytes Page：7 Pages

封装/外壳：SC-70，SOT-323 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：TRANS PREBIAS PNP 200MW UMT3 分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置

PNP SILICON BIAS RESISTOR TRANSISTOR

This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. The

Bias Resistor Transistor PNP Silicon Surface Mount Transistor with Monolithic Bias Resistor Network

The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital transistors are designed to replace a single device and its xternal resistor bias network. The BRT eliminate

CASE 463-01, STYLE 1 SOT-416/SC-90

The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminat

CASE 463-01, STYLE 1 SOT-416/SC-90

Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital trans

0.25關m Sea of Gates and Customer Structured Arrays

DESCRIPTION Oki’s 0.25µm Application-Specific Integrated Circuit (ASIC) products are available in both Sea Of Gates (SOG) and Customer Structured Array (CSA) architectures. Both the SOG-based MG115P series and the CSA-based MG75P series use a five-layer metal process on 0.25µm drawn (0.18µm L-eff