Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz

1FEATURES 23• No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered • Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or -5

Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz

文件：1.27073 Mbytes Page：17 Pages

DS90C383/DS90CF384 3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz, 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-65 MHz

General Description The DS90C383 transmitter converts 28 bits of LVCMOS/ LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bit

3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz

文件：410.45 Kbytes Page：22 Pages

3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz, 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-65 MHz

文件：344.12 Kbytes Page：20 Pages

Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz

1FEATURES 23• No special start-up sequence required between clock/data and /PD pins. Input signal (clock and data) can be applied either before or after the device is powered • Support Spread Spectrum Clocking up to 100kHz frequency modulation and deviations of ±2.5% center spread or -5

3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz, 3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz

文件：258.44 Kbytes Page：11 Pages

3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz 3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz

文件：304.25 Kbytes Page：11 Pages