DiskStation DS213

Highlights ●●Optimal Price/Performance Ratio ●●Features SuperSpeed USB 3.0 ●●Effective Backup Solutions ●●Hassle-free System Installation ●●Running on Synology DiskStation Manager (DSM)

3.3V E1/T1/J1 Line Interface

DESCRIPTION The DS21348 is a complete selectable E1 or T1 LIU for short-haul and long-haul applications. Throughout the data sheet, J1 is represented wherever T1 exists. Receive sensitivity adjusts automatically to the incoming signal and can be programmed for 0dB to 12 dB or 0dB to 43dB for E1

3.3V E1/T1/J1 Line Interface

DESCRIPTION The DS21348 is a complete selectable E1 or T1 LIU for short-haul and long-haul applications. Throughout the data sheet, J1 is represented wherever T1 exists. Receive sensitivity adjusts automatically to the incoming signal and can be programmed for 0dB to 12 dB or 0dB to 43dB for E1

3.3V E1/T1/J1 Line Interface

DESCRIPTION The DS21348 is a complete selectable E1 or T1 LIU for short-haul and long-haul applications. Throughout the data sheet, J1 is represented wherever T1 exists. Receive sensitivity adjusts automatically to the incoming signal and can be programmed for 0dB to 12 dB or 0dB to 43dB for E1

3.3V E1/T1/J1 Line Interface

DESCRIPTION The DS21348 is a complete selectable E1 or T1 LIU for short-haul and long-haul applications. Throughout the data sheet, J1 is represented wherever T1 exists. Receive sensitivity adjusts automatically to the incoming signal and can be programmed for 0dB to 12 dB or 0dB to 43dB for E1

3.3V E1/T1/J1 Line Interface

DESCRIPTION The DS21348 is a complete selectable E1 or T1 LIU for short-haul and long-haul applications. Throughout the data sheet, J1 is represented wherever T1 exists. Receive sensitivity adjusts automatically to the incoming signal and can be programmed for 0dB to 12 dB or 0dB to 43dB for E1

3.3V DS21352 and 5V DS21552 T1 Single-Chip Transceivers

DESCRIPTION The DS21352/552 T1 single-chip transceiver contains all of the necessary functions for connection to T1 lines whether they are DS1 long haul or DSX–1 short haul. The clock recovery circuitry automatically adjusts to T1 lines from 0 feet to over 6000 feet in length. The device can gene

T1/E1/J1 Single-Chip Transceiver

GENERAL DESCRIPTION The DS2155 is a software-selectable T1, E1, or J1 single-chip transceiver (SCT) for short-haul and long-haul applications. The DS2155 is composed of a line interface unit (LIU), framer, HDLC controllers, and a TDM backplane interface, and is controlled by an 8-bit parallel por

T1 Single-Chip Transceivers

DESCRIPTION The DS21352/552 T1 single-chip transceiver contains all of the necessary functions for connection to T1 lines whether they are DS1 long haul or DSX–1 short haul. The clock recovery circuitry automatically adjusts to T1 lines from 0 feet to over 6000 feet in length. The device can gene

3.3V DS21352 and 5V DS21552 T1 Single-Chip Transceivers

DESCRIPTION The DS21352/552 T1 single-chip transceiver contains all of the necessary functions for connection to T1 lines whether they are DS1 long haul or DSX–1 short haul. The clock recovery circuitry automatically adjusts to T1 lines from 0 feet to over 6000 feet in length. The device can gene

3.3V DS21352 and 5V DS21552 T1 Single-Chip Transceivers

DESCRIPTION The DS21352/552 T1 single-chip transceiver contains all of the necessary functions for connection to T1 lines whether they are DS1 long haul or DSX–1 short haul. The clock recovery circuitry automatically adjusts to T1 lines from 0 feet to over 6000 feet in length. The device can gene

T1 Single-Chip Transceivers

DESCRIPTION The DS21352/552 T1 single-chip transceiver contains all of the necessary functions for connection to T1 lines whether they are DS1 long haul or DSX–1 short haul. The clock recovery circuitry automatically adjusts to T1 lines from 0 feet to over 6000 feet in length. The device can gene

T1/E1/J1 Single-Chip Transceiver

GENERAL DESCRIPTION The DS2155 is a software-selectable T1, E1, or J1 single-chip transceiver (SCT) for short-haul and long-haul applications. The DS2155 is composed of a line interface unit (LIU), framer, HDLC controllers, and a TDM backplane interface, and is controlled by an 8-bit parallel por

3.3V/5V E1 Single-Chip Transceivers

DESCRIPTION The DS21354/554 Single-Chip Transceiver (SCT) contains all of the necessary functions for connection to E1 lines. The device is an upward compatible version of the DS2153 and DS2154 SCTs. The onboard clock/data recovery circuitry coverts the AMI/HDB3 E1 waveforms to an NRZ serial st

MTTF is frequently used interchangeably with MTBF

DESCRIPTION The DS21354/554 Single-Chip Transceiver (SCT) contains all of the necessary functions for connection to E1 lines. The device is an upward compatible version of the DS2153 and DS2154 SCTs. The onboard clock/data recovery circuitry coverts the AMI/HDB3 E1 waveforms to an NRZ serial st

3.3V/5V E1 Single-Chip Transceivers

DESCRIPTION The DS21354/554 Single-Chip Transceiver (SCT) contains all of the necessary functions for connection to E1 lines. The device is an upward compatible version of the DS2153 and DS2154 SCTs. The onboard clock/data recovery circuitry coverts the AMI/HDB3 E1 waveforms to an NRZ serial st

3.3V/5V E1 Single-Chip Transceivers

DESCRIPTION The DS21354/554 Single-Chip Transceiver (SCT) contains all of the necessary functions for connection to E1 lines. The device is an upward compatible version of the DS2153 and DS2154 SCTs. The onboard clock/data recovery circuitry coverts the AMI/HDB3 E1 waveforms to an NRZ serial st

3.3V Bit Error Rate Tester BERT

DESCRIPTION The DS21372 Bit Error Rate Tester (BERT) is a software programmable test pattern generator, receiver, and analyzer capable of meeting the most stringent error performance requirements of digital transmission facilities. Two categories of test pattern generation (Pseudo-random and Repe

3.3V Bit Error Rate Tester BERT

DESCRIPTION The DS21372 Bit Error Rate Tester (BERT) is a software programmable test pattern generator, receiver, and analyzer capable of meeting the most stringent error performance requirements of digital transmission facilities. Two categories of test pattern generation (Pseudo-random and Repe

3.3V Bit Error Rate Tester BERT

DESCRIPTION The DS21372 Bit Error Rate Tester (BERT) is a software programmable test pattern generator, receiver, and analyzer capable of meeting the most stringent error performance requirements of digital transmission facilities. Two categories of test pattern generation (Pseudo-random and Repe

DiskStation DS213

Highlights ●●Built-in WiFi for Wireless Environment ●●Features SuperSpeed USB 3.0 ●●Cool and Quiet Design ●●Hassle-free System Installation with Mobile Devices ●●Running on Synology DiskStation Manager (DSM)

DiskStation DS213j

Highlights ●●Floating-Point Unit Enabled CPU Favored Multimedia Processing ●●Large 512MB RAM for Multitasking ●●Over 100MB/sec Reading, 70MB/sec Writing ●●Wake on LAN Ready ●●Cool and Quiet Chassis ●●DLNA® Compliant Media Server ●●Running on Synology DiskStation Manager

DiskStation DS213

● ●Dual Core CPU with Floating-Point Unit ● ●Extra Power-saving System Hibernation ● ●110.36 MB/sec Reading, 84.31 MB/sec Writing ● ●Hardware Encryption Engine ● ●Features SuperSpeed USB 3.0 ● ●Windows® ADS and LDAP Directory Service Support ● ●Hassle-free System Installation ● ●Running on

封装/外壳：28-DIP（0.300"，7.62mm） 包装：管件 描述：IC VOICE REC/PLAY 32SEC 28DIP 集成电路（IC） 语音录制和回放

封装/外壳：28-DIP（0.600"，15.24mm） 描述：IC VOICE REC/PLAY 28DIP 集成电路（IC） 语音录制和回放

IC PROCESSOR ANSWER MACH 28-DIP

Digital Answering Machine Processor

文件：231.79 Kbytes Page：17 Pages

3.3V E1/T1/J1 Line Interface

文件：792.77 Kbytes Page：76 Pages

3.3V、E1/T1/J1线路接口

3.3V E1/T1/J1 Line Interface

文件：792.77 Kbytes Page：76 Pages

3.3V E1/T1/J1 Line Interface

文件：792.77 Kbytes Page：76 Pages

3.3V E1/T1/J1 Line Interface

文件：792.77 Kbytes Page：76 Pages

3.3V E1/T1/J1 Line Interface

文件：792.77 Kbytes Page：76 Pages

3.3V E1/T1/J1 Line Interface

文件：792.77 Kbytes Page：76 Pages

3.3V E1/T1/J1 Line Interface

文件：792.77 Kbytes Page：76 Pages

3.3V E1/T1/J1 Line Interface

文件：792.77 Kbytes Page：76 Pages

3.3V E1/T1/J1 Line Interface

文件：792.77 Kbytes Page：76 Pages

3.3V T1/J1 Line Interface Unit

文件：667.57 Kbytes Page：35 Pages

3.3V、T1/J1线路接口单元

3.3V T1/J1 Line Interface Unit

文件：387.46 Kbytes Page：32 Pages

3.3V T1/J1 Line Interface Unit

文件：667.57 Kbytes Page：35 Pages

T1/J1 Line Interface Unit Design Kit

文件：506.67 Kbytes Page：14 Pages

3.3V T1/J1 Line Interface Unit

文件：667.57 Kbytes Page：35 Pages

3.3V T1/J1 Line Interface Unit

文件：387.46 Kbytes Page：32 Pages

3.3V T1/J1 Line Interface Unit

文件：667.57 Kbytes Page：35 Pages

3.3V T1/J1 Line Interface Unit

文件：667.57 Kbytes Page：35 Pages

3.3V T1/J1 Line Interface Unit

文件：387.46 Kbytes Page：32 Pages

3.3V T1/J1 Line Interface Unit

文件：667.57 Kbytes Page：35 Pages

T1/E1/CEPT/ISDN-PRI TRANSFORMERS

文件：1.41936 Mbytes Page：5 Pages

T1 Single-Chip Transceiver Design Kit Daughter Card

文件：1.07553 Mbytes Page：21 Pages

E1 Single-Chip Transceiver Design Kit Daughter Card

文件：945.38 Kbytes Page：21 Pages

3.3V Bit Error Rate Tester (BERT)

文件：180.64 Kbytes Page：22 Pages

3.3V Bit Error Rate Tester (BERT)

文件：180.64 Kbytes Page：22 Pages

5횞20mm time-Lag surge withstand glass body cartridge fuse designed to IEC specification

文件：880.08 Kbytes Page：3 Pages

FUSE HOLDER SELECTION GUIDE

文件：258.149 Kbytes Page：4 Pages

M8 Male 4 Pin Field Attachable

文件：200.16 Kbytes Page：2 Pages

High-Temperature Masking Tape

文件：53.61 Kbytes Page：2 Pages

M8 Male 4 Pin Field Attachable

文件：200.16 Kbytes Page：2 Pages