型号 功能描述 生产厂家 企业 LOGO 操作
DM74ALS27

Triple 3-Input NOR Gate

General Description This device contains three independent gates, each of which performs the logic NOR function. Features ■Switching specifications at 50 pF ■Switching specifications guaranteed over full temperature and VCCrange ■Advanced oxide-isolated, ion-implanted Schottky TTL

Fairchild

仙童半导体

DM74ALS27

Triple 3-Input NOR Gate

TI

德州仪器

DM74ALS27

Triple 3-Input NOR Gate

ONSEMI

安森美半导体

Octal D-Type Edge-Triggered Flip-Flop with Clear

General Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pul

Fairchild

仙童半导体

Octal D-Type Edge-Triggered Flip-Flop with Clear

General Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pulse.

ONSEMI

安森美半导体

Octal D-Type Edge-Triggered Flip-Flop with Clear

General Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pulse.

ONSEMI

安森美半导体

Octal D-Type Edge-Triggered Flip-Flop with Clear

General Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pul

Fairchild

仙童半导体

Octal D-Type Edge-Triggered Flip-Flop with Clear

General Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pulse.

ONSEMI

安森美半导体

Octal D-Type Edge-Triggered Flip-Flop with Clear

General Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pul

Fairchild

仙童半导体

Octal D-Type Edge-Triggered Flip-Flop with Clear

General Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pulse.

ONSEMI

安森美半导体

Octal D-Type Edge-Triggered Flip-Flop with Clear

General Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pul

Fairchild

仙童半导体

Octal D-Type Edge-Triggered Flip-Flop with Clear

General Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pulse.

ONSEMI

安森美半导体

Octal D-Type Edge-Triggered Flip-Flop with Clear

General Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pul

Fairchild

仙童半导体

Triple 3-Input NOR Gate

General Description This device contains three independent gates, each of which performs the logic NOR function. Features ■Switching specifications at 50 pF ■Switching specifications guaranteed over full temperature and VCCrange ■Advanced oxide-isolated, ion-implanted Schottky TTL

Fairchild

仙童半导体

Triple 3-Input NOR Gate

General Description This device contains three independent gates, each of which performs the logic NOR function. Features ■Switching specifications at 50 pF ■Switching specifications guaranteed over full temperature and VCCrange ■Advanced oxide-isolated, ion-implanted Schottky TTL

Fairchild

仙童半导体

Octal D-Type Edge-Triggered Flip-Flop with Clear

ONSEMI

安森美半导体

封装/外壳:20-SSOP(0.209",5.30mm 宽) 功能:主复位 包装:管件 描述:IC FF D-TYPE SNGL 8BIT 20SSOP 集成电路(IC) 触发器

ONSEMI

安森美半导体

封装/外壳:20-DIP(0.300",7.62mm) 功能:主复位 包装:袋 描述:IC FF D-TYPE SNGL 8BIT 20DIP 集成电路(IC) 触发器

ONSEMI

安森美半导体

Triple 3-Input NOR gate

Triple 3-Input NOR gate

Philips

飞利浦

Triple 3-Input NOR gate

Triple 3-Input NOR gate

Philips

飞利浦

Triple 3-Input NOR gate

Triple 3-Input NOR gate

Philips

飞利浦

DM74ALS27产品属性

  • 类型

    描述

  • 型号

    DM74ALS27

  • 功能描述

    触发器 Oct D-Type Flip-Flop

  • RoHS

  • 制造商

    Texas Instruments

  • 电路数量

    2

  • 逻辑系列

    SN74

  • 逻辑类型

    D-Type Flip-Flop

  • 极性

    Inverting, Non-Inverting

  • 输入类型

    CMOS

  • 传播延迟时间

    4.4 ns

  • 高电平输出电流

    - 16 mA

  • 低电平输出电流

    16 mA

  • 电源电压-最大

    5.5 V

  • 最大工作温度

    + 85 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    X2SON-8

  • 封装

    Reel

更新时间:2025-10-19 22:59:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
onsemi(安森美)
24+
SOP14
2669
只做原装,提供一站式配单服务,代工代料。BOM配单
FAIRCHILD/仙童
24+
NA/
5750
原装现货,当天可交货,原型号开票
NSC
2016+
SOP
9000
只做原装,假一罚十,公司可开17%增值税发票!
NSC
NEW
SO-20
9823
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订
NS/美国国半
25+
DIP14
54648
百分百原装现货 实单必成 欢迎询价
NS
22+
DIP14
8000
原装正品支持实单
24+
DIP
10
NSC
SOP
53650
一级代理 原装正品假一罚十价格优势长期供货
NS
2450+
SOP14
6540
只做原厂原装正品终端客户免费申请样品
NSC
10
公司优势库存 热卖中!!

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