3-STATE Quad 1-of-2-Line Data Selector/Multiplexer

General Description These data selectors/multiplexers contain inverters and drivers to supply full on-chip data selection to the four 3-STATE outputs that can interface directly with data lines of bus-organized systems. A 4-bit word selected from one of two sources is routed to the four outputs.

封装/外壳：16-SOIC（0.209"，5.30mm 宽） 包装：管件 描述：IC MULTIPLEXER 4 X 2:1 16SOP 集成电路（IC） 信号开关，多路复用器，解码器

3-STATE Quad 1-of-2-Line Data Selector/Multiplexer

General Description These data selectors/multiplexers contain inverters and drivers to supply full on-chip data selection to the four 3-STATE outputs that can interface directly with data lines of bus-organized systems. A 4-bit word selected from one of two sources is routed to the four outputs.

封装/外壳：16-SOIC（0.209"，5.30mm 宽） 包装：管件 描述：IC MULTIPLEXER 4 X 2:1 16SOP 集成电路（IC） 信号开关，多路复用器，解码器

Data selector/multiplexer

74ALS257 Quad 2-input data selector, non-inverting (3-State) 74ALS258 Quad 2-input data selector, inverting (3-State) DESCRIPTION The 74ALS257 is a quad 2-input multiplexer which selects 4 bits of data from one of two sources under the control of a common select input (S). The output en

Data selector/multiplexer

74ALS257 Quad 2-input data selector, non-inverting (3-State) 74ALS258 Quad 2-input data selector, inverting (3-State) DESCRIPTION The 74ALS257 is a quad 2-input multiplexer which selects 4 bits of data from one of two sources under the control of a common select input (S). The output en

Data selector/multiplexer

74ALS257 Quad 2-input data selector, non-inverting (3-State) 74ALS258 Quad 2-input data selector, inverting (3-State) DESCRIPTION The 74ALS257 is a quad 2-input multiplexer which selects 4 bits of data from one of two sources under the control of a common select input (S). The output en

Data selector/multiplexer

74ALS257 Quad 2-input data selector, non-inverting (3-State) 74ALS258 Quad 2-input data selector, inverting (3-State) DESCRIPTION The 74ALS257 is a quad 2-input multiplexer which selects 4 bits of data from one of two sources under the control of a common select input (S). The output en