Quad 1-of-2 Line Data Selector/Multiplexer

General Description These data selectors/multiplexers contain inverters and drivers to supply full on-chip data selection to the four output gates. A separate strobe input is provided. A 4-bit word is selected from one of two sources and is routed to the four outputs. The ALS157 presents true dat

封装/外壳：16-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC MULTIPLEXER 4 X 2:1 16SOP 集成电路（IC） 信号开关，多路复用器，解码器

Quad 1-of-2 Line Data Selector/Multiplexer

General Description These data selectors/multiplexers contain inverters and drivers to supply full on-chip data selection to the four output gates. A separate strobe input is provided. A 4-bit word is selected from one of two sources and is routed to the four outputs. The ALS157 presents true dat

封装/外壳：16-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC MULTIPLEXER 4 X 2:1 16SOP 集成电路（IC） 信号开关，多路复用器，解码器

Quad 1-of-2 Line Data Selector/Multiplexer

General Description These data selectors/multiplexers contain inverters and drivers to supply full on-chip data selection to the four output gates. A separate strobe input is provided. A 4-bit word is selected from one of two sources and is routed to the four outputs. The ALS157 presents true dat

Data selector/multiplexer

74ALS157 Quad 2-input data selector/multiplexer, non-inverting 74ALS158 Quad 2-input data selector/multiplexer, inverting DESCRIPTION The 74ALS157 is a quad 2-input multiplexer which selects 4 bits of data from one of two sources under the control of a common select input (S). The enabl

Data selector/multiplexer

74ALS157 Quad 2-input data selector/multiplexer, non-inverting 74ALS158 Quad 2-input data selector/multiplexer, inverting DESCRIPTION The 74ALS157 is a quad 2-input multiplexer which selects 4 bits of data from one of two sources under the control of a common select input (S). The enabl

Data selector/multiplexer

74ALS157 Quad 2-input data selector/multiplexer, non-inverting 74ALS158 Quad 2-input data selector/multiplexer, inverting DESCRIPTION The 74ALS157 is a quad 2-input multiplexer which selects 4 bits of data from one of two sources under the control of a common select input (S). The enabl