MOS INTEGRATED CIRCUIT

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA package (13 x 15) • HSTL interface • PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size •

36M-BIT DDR II SRAM 2-WORD BURST OPERATION

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • PLL circuitry for wide output data valid window and future frequency scaling • Pipelined double data rate operation • Common data input/output bus • Two-tick burst for low DDR transaction size • Two inpu