18-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT

Functional Description The CY7C2163KV18, and CY7C2165KV18 are 1.8 V synchronous pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array. The read port ha

18-Mbit QDR® II SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT

封装/外壳：165-LBGA 包装：托盘 描述：IC SRAM 18MBIT PARALLEL 165FBGA 集成电路（IC） 存储器

Synchronous SRAM

Synchronous SRAM

封装/外壳：165-LBGA 包装：卷带（TR） 描述：IC SRAM 18MBIT PARALLEL 165FBGA 集成电路（IC） 存储器