型号 功能描述 生产厂家 企业 LOGO 操作
CY7C1916CV18

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

更新时间:2025-10-19 22:59:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
CYPRESS/赛普拉斯
24+
NA/
1800
优势代理渠道,原装正品,可全系列订货开增值税票
CYPRESS/赛普拉斯
24+
BGA
6618
公司现货库存,支持实单
CYPRESS
NEW
SOJ/28
9526
代理全系列销售, 全新原装正品,价格优势,长期供应,量大可订
CYPRESS/赛普拉斯
24+
SOJ
8540
只做原装正品现货或订货假一赔十!
CYPRESS/赛普拉斯
25+
SOJ-28L
1800
原装正品,假一罚十!
24+
长期备有现货
500000
行业低价,代理渠道
CYPRESS
22+
SOJ
8000
原装正品支持实单
Cypress
96
10
公司优势库存 热卖中!!
CYPRESS
23+
PDIP28 BN
7000
CYPRESS
23+
SOJ
44207
公司原装现货!主营品牌!可含税欢迎查询

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