型号 功能描述 生产厂家 企业 LOGO 操作
CY7C1916CV18

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

更新时间:2025-12-19 9:48:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
CYPRESS/赛普拉斯
23+
SOJ-28L
50000
全新原装正品现货,支持订货
CYPRESS
23+
SOJ
8560
受权代理!全新原装现货特价热卖!
CYPRESS/赛普拉斯
25+
SOJ-28L
1800
原装正品,假一罚十!
CYPRESS/赛普拉斯
24+
BGA
6618
公司现货库存,支持实单
Cypress
25+
电联咨询
7800
公司现货,提供拆样技术支持
CYPRESS/赛普拉斯
24+
NA/
1800
优势代理渠道,原装正品,可全系列订货开增值税票
Cypress
SMD/DIP
3200
Cypress一级分销,原装原盒原包装!
Cypress
25+
10
公司优势库存 热卖中!!
CYPRESS
23+
SOJ
44207
公司原装现货!主营品牌!可含税欢迎查询
Cypress Semiconductor Corp
24+
28-SOJ
56200
一级代理/放心采购

CY7C1916CV18数据表相关新闻