16K x 4 Static RAM

Functional Description The CY7C164 and CY7C166 are high-performance CMOS static RAMs organized as 16,384 by 4 bits. Features • High speed — 15 ns • Output enable (OE) feature (CY7C166) • CMOS for optimum speed/power • Low active power — 633 mW • Low standby power — 110 mW •

16K x 4 Static RAM

文件：266.19 Kbytes Page：9 Pages

16K x 4 Static RAM

16K x 4 Static RAM

Functional Description The CY7C164 and CY7C166 are high-performance CMOS static RAMs organized as 16,384 by 4 bits. Features • High speed — 15 ns • Output enable (OE) feature (CY7C166) • CMOS for optimum speed/power • Low active power — 633 mW • Low standby power — 110 mW •

16K x 4 Static RAM

Functional Description The CY7C164 and CY7C166 are high-performance CMOS static RAMs organized as 16,384 by 4 bits. Features • High speed — 15 ns • Output enable (OE) feature (CY7C166) • CMOS for optimum speed/power • Low active power — 633 mW • Low standby power — 110 mW •

16K x 4 Static RAM

Functional Description The CY7C164 and CY7C166 are high-performance CMOS static RAMs organized as 16,384 by 4 bits. Features • High speed — 15 ns • Output enable (OE) feature (CY7C166) • CMOS for optimum speed/power • Low active power — 633 mW • Low standby power — 110 mW •

16K x 4 Static RAM

Functional Description The CY7C164 and CY7C166 are high-performance CMOS static RAMs organized as 16,384 by 4 bits. Features • High speed — 15 ns • Output enable (OE) feature (CY7C166) • CMOS for optimum speed/power • Low active power — 633 mW • Low standby power — 110 mW •

16K x 4 Static RAM

Functional Description The CY7C164 and CY7C166 are high-performance CMOS static RAMs organized as 16,384 by 4 bits. Features • High speed — 15 ns • Output enable (OE) feature (CY7C166) • CMOS for optimum speed/power • Low active power — 633 mW • Low standby power — 110 mW •

16K x 4 Static RAM

Functional Description The CY7C164 and CY7C166 are high-performance CMOS static RAMs organized as 16,384 by 4 bits. Features • High speed — 15 ns • Output enable (OE) feature (CY7C166) • CMOS for optimum speed/power • Low active power — 633 mW • Low standby power — 110 mW •

16K x 4 Static RAM

Functional Description The CY7C164 and CY7C166 are high-performance CMOS static RAMs organized as 16,384 by 4 bits. Features • High speed — 15 ns • Output enable (OE) feature (CY7C166) • CMOS for optimum speed/power • Low active power — 633 mW • Low standby power — 110 mW •

16K x 4 Static RAM

Functional Description The CY7C164 and CY7C166 are high-performance CMOS static RAMs organized as 16,384 by 4 bits. Features • High speed — 15 ns • Output enable (OE) feature (CY7C166) • CMOS for optimum speed/power • Low active power — 633 mW • Low standby power — 110 mW •

144-Mbit DDR II SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)

Functional Description The CY7C1648KV18, and CY7C1650KV18 are 1.8-V synchronous pipelined SRAMs equipped with DDR II+ architecture. The DDR II+ consists of an SRAM core with advanced synchronous peripheral circuitry. Features ■ 144-Mbit density (8 M × 18, 4 M × 36) ■ 450-MHz clock for high ban

144-Mbit DDR II SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)

Functional Description The CY7C1648KV18, and CY7C1650KV18 are 1.8-V synchronous pipelined SRAMs equipped with DDR II+ architecture. The DDR II+ consists of an SRAM core with advanced synchronous peripheral circuitry. Features ■ 144-Mbit density (8 M × 18, 4 M × 36) ■ 450-MHz clock for high ban

16K x 4 Static RAM

文件：266.19 Kbytes Page：9 Pages

16K x 4 Static RAM

文件：266.19 Kbytes Page：9 Pages

16K x 4 Static RAM

文件：266.19 Kbytes Page：9 Pages

144-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)

文件：861.72 Kbytes Page：31 Pages

同步 SRAM

144-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)

文件：861.72 Kbytes Page：31 Pages

144-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)

文件：861.72 Kbytes Page：31 Pages

Synchronous SRAM

封装/外壳：165-LBGA 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC SRAM 144MBIT PARALLEL 165FBGA 集成电路（IC） 存储器

封装/外壳：165-LBGA 包装：托盘 描述：IC SRAM 144MBIT PARALLEL 165FBGA 集成电路（IC） 存储器

144-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)

文件：861.72 Kbytes Page：31 Pages

144-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)

文件：861.72 Kbytes Page：31 Pages

144-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)

文件：861.72 Kbytes Page：31 Pages

144-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)

文件：861.72 Kbytes Page：31 Pages

144-Mbit QDR짰 II SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)

文件：861.72 Kbytes Page：31 Pages

144-Mbit DDR II SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)

文件：857.34 Kbytes Page：30 Pages

144-Mbit DDR II SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)

文件：857.34 Kbytes Page：30 Pages

5V 8K X 8 CMOS SRAM

Function description The AS7C164 is a high performance CMOS 65,536-bit Static Random Access Memory (SRAM) device organized as 8,192 words × 8 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. Features • AS7C164 (5V version) • Co

Fully static operation

GENERAL DESCRIPTION The AS7C164A is a 65,536-bit high speed CMOS static random access memory organized as 8,192 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. FEATURES ■ Fa

8K X 8 BIT HIGH SPEED CMOS SRAM

文件：459.71 Kbytes Page：10 Pages