144-Mbit QDR짰 II SRAM Four-Word Burst Architecture

Functional Description The CY7C1613KV18, and CY7C1615KV18 are 1.8-V synchronous pipelined SRAMs, equipped with QDR® II architecture. QDR II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedicated data outputs to support

144-Mbit QDR® II SRAM Four-Word Burst Architecture

同步 SRAM

封装/外壳：165-LBGA 包装：托盘 描述：IC SRAM 144MBIT PARALLEL 165FBGA 集成电路（IC） 存储器

同步 SRAM

封装/外壳：165-LBGA 包装：托盘 描述：IC SRAM 144MBIT PARALLEL 165FBGA 集成电路（IC） 存储器