72-Mbit QDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1510KV18, CY7C1525KV18, CY7C1512KV18, and CY7C1514KV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedicat

72-Mbit QDR-II SRAM 2-Word Burst Architecture

文件：836.04 Kbytes Page：30 Pages

72-Mbit QDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1510KV18, CY7C1525KV18, CY7C1512KV18, and CY7C1514KV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedicat

72-Mbit QDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1510KV18, CY7C1525KV18, CY7C1512KV18, and CY7C1514KV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedicat

72-Mbit QDR-II SRAM 2-Word Burst Architecture

文件：836.04 Kbytes Page：30 Pages

72-Mbit QDR II SRAM 2-Word Burst Architecture Two-word burst on all accesses

文件：920.95 Kbytes Page：33 Pages

72-Mbit QDR-II SRAM 2-Word Burst Architecture

文件：836.04 Kbytes Page：30 Pages