72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM

Functional Description[1] The CY7C1480V33/CY7C1482V33/CY7C1486V33 SRAM integrates 2M x 36/4M x 18/1M × 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-trigg

72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM

文件：1.29368 Mbytes Page：32 Pages

72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined Sync SRAM

文件：1.11452 Mbytes Page：36 Pages

72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM

文件：578.57 Kbytes Page：31 Pages

72-Mbit (2 M x 36) Pipelined Sync SRAM

文件：479.57 Kbytes Page：25 Pages