CY7C1460AV33价格

参考价格:¥312.0016

型号:CY7C1460AV33-167AXC 品牌:Cynergy 3 备注:这里有CY7C1460AV33多少钱,2025年最近7天走势,今日出价,今日竞价,CY7C1460AV33批发/采购报价,CY7C1460AV33行情走势销售排行榜,CY7C1460AV33报价。
型号 功能描述 生产厂家&企业 LOGO 操作
CY7C1460AV33

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

Functional Description The CY7C1460AV33/CY7C1462AV33/CY7C1464AV33 are 3.3V, 1M x 36/2M x 18/512K x72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1460

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1460AV33

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1460AV33

36-Mbit (1 M x 36/2 M x 18) Pipelined SRAM with NoBL Architecture

文件:972.26 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

Functional Description The CY7C1460AV33/CY7C1462AV33/CY7C1464AV33 are 3.3V, 1M x 36/2M x 18/512K x72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1460

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

Functional Description The CY7C1460AV33/CY7C1462AV33/CY7C1464AV33 are 3.3V, 1M x 36/2M x 18/512K x72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1460

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

Functional Description The CY7C1460AV33/CY7C1462AV33/CY7C1464AV33 are 3.3V, 1M x 36/2M x 18/512K x72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1460

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

Functional Description The CY7C1460AV33/CY7C1462AV33/CY7C1464AV33 are 3.3V, 1M x 36/2M x 18/512K x72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1460

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

Functional Description The CY7C1460AV33/CY7C1462AV33/CY7C1464AV33 are 3.3V, 1M x 36/2M x 18/512K x72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1460

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

Functional Description The CY7C1460AV33/CY7C1462AV33/CY7C1464AV33 are 3.3V, 1M x 36/2M x 18/512K x72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1460

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

Functional Description The CY7C1460AV33/CY7C1462AV33/CY7C1464AV33 are 3.3V, 1M x 36/2M x 18/512K x72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1460

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

Functional Description The CY7C1460AV33/CY7C1462AV33/CY7C1464AV33 are 3.3V, 1M x 36/2M x 18/512K x72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1460

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

Functional Description The CY7C1460AV33/CY7C1462AV33/CY7C1464AV33 are 3.3V, 1M x 36/2M x 18/512K x72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1460

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

Functional Description The CY7C1460AV33/CY7C1462AV33/CY7C1464AV33 are 3.3V, 1M x 36/2M x 18/512K x72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1460

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

Functional Description The CY7C1460AV33/CY7C1462AV33/CY7C1464AV33 are 3.3V, 1M x 36/2M x 18/512K x72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1460

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

Functional Description The CY7C1460AV33/CY7C1462AV33/CY7C1464AV33 are 3.3V, 1M x 36/2M x 18/512K x72 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL™) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1460

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1 M x 36/2 M x 18) Pipelined SRAM with NoBL Architecture

文件:972.26 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1 M 횞 36/2 M 횞 18) Pipelined SRAM with NoBL??Architecture

文件:1.0005 Mbytes Page:31 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1 M 횞 36/2 M 횞 18) Pipelined SRAM with NoBL??Architecture

文件:1.0005 Mbytes Page:31 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1 M x 36/2 M x 18) Pipelined SRAM with NoBL Architecture

文件:972.26 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

封装/外壳:100-LQFP 包装:托盘 描述:IC SRAM 36MBIT PARALLEL 100TQFP 集成电路(IC) 存储器

ETC

知名厂家

封装/外壳:100-LQFP 包装:托盘 描述:IC SRAM 36MBIT PARALLEL 100TQFP 集成电路(IC) 存储器

ETC

知名厂家

36-Mbit (1 M 횞 36/2 M 횞 18) Pipelined SRAM with NoBL??Architecture

文件:1.0005 Mbytes Page:31 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1 M x 36/2 M x 18) Pipelined SRAM with NoBL Architecture

文件:972.26 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1 M 횞 36/2 M 횞 18) Pipelined SRAM with NoBL??Architecture

文件:1.0005 Mbytes Page:31 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1 M x 36/2 M x 18) Pipelined SRAM with NoBL Architecture

文件:972.26 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1 M 횞 36/2 M 횞 18) Pipelined SRAM with NoBL??Architecture

文件:1.0005 Mbytes Page:31 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1 M x 36/2 M x 18) Pipelined SRAM with NoBL Architecture

文件:972.26 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1 M 횞 36/2 M 횞 18) Pipelined SRAM with NoBL??Architecture

文件:1.0005 Mbytes Page:31 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1 M x 36/2 M x 18) Pipelined SRAM with NoBL Architecture

文件:972.26 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1 M x 36/2 M x 18) Pipelined SRAM with NoBL Architecture

文件:972.26 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1 M 횞 36/2 M 횞 18) Pipelined SRAM with NoBL??Architecture

文件:1.0005 Mbytes Page:31 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL??Architecture

文件:513.48 Kbytes Page:27 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1460AV33产品属性

  • 类型

    描述

  • 型号

    CY7C1460AV33

  • 功能描述

    静态随机存取存储器 1Mx36 3.3V NoBL PL 静态随机存取存储器 COM

  • RoHS

  • 制造商

    Cypress Semiconductor

  • 存储容量

    16 Mbit

  • 组织

    1 M x 16

  • 访问时间

    55 ns

  • 电源电压-最大

    3.6 V

  • 电源电压-最小

    2.2 V

  • 最大工作电流

    22 uA

  • 最大工作温度

    + 85 C

  • 最小工作温度

    - 40 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    TSOP-48

  • 封装

    Tray

更新时间:2025-8-10 10:46:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
Cypress
25+
电联咨询
7800
公司现货,提供拆样技术支持
CYPRESS(赛普拉斯)
24+
LQFP-100
14093
正规渠道,大量现货,只等你来。
CYPRESS
20+
TQFP100
500
样品可出,优势库存欢迎实单
CYPRESS
23+24
BGA
29850
原装原标原盘。终端BOM表可配单。可开13%增值税发票
CYPRESS/赛普拉斯
2407+
QFP
7750
原装现货!实单直说!特价!
CYPRESS/赛普拉斯
24+
SOP
9600
原装现货,优势供应,支持实单!
CYPRESS
22+
BGA
8000
原装正品支持实单
CYPRESS
24+
BGA
23000
免费送样原盒原包现货一手渠道联系
CYPRESS
24+
TQFP-100
2
低于市场价,实单必成,QQ1562321770
CYPRESS
25+
BGA
2309
品牌专业分销商,可以零售

CY7C1460AV33数据表相关新闻