型号 功能描述 生产厂家 企业 LOGO 操作
CY7C1362B

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

封装/外壳:100-LQFP 包装:管件 描述:IC SRAM 9MBIT PARALLEL 100TQFP 集成电路(IC) 存储器

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

IC SRAM 9M PARALLEL 100TQFP

Infineon

英飞凌

IC SRAM 9M PARALLEL 119PBGA

Infineon

英飞凌

封装/外壳:119-BGA 包装:管件 描述:IC SRAM 9MBIT PARALLEL 119PBGA 集成电路(IC) 存储器

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 36/512K x 18 Synchronous Pipelined Burst SRAM

Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

Functional Description The CY7C1360C/CY7C1362C SRAM integrates 262,144 x 36 and 524,288 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Pipelined SRAM

文件:521.48 Kbytes Page:31 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1362B产品属性

  • 类型

    描述

  • 型号

    CY7C1362B

  • 功能描述

    IC SRAM 9MBIT 166MHZ 100LQFP

  • RoHS

  • 类别

    集成电路(IC) >> 存储器

  • 系列

    -

  • 标准包装

    96

  • 系列

    - 格式 -

  • 存储器

    闪存

  • 存储器类型

    FLASH

  • 存储容量

    16M(2M x 8,1M x 16)

  • 速度

    70ns

  • 接口

    并联

  • 电源电压

    2.65 V ~ 3.6 V

  • 工作温度

    -40°C ~ 85°C

  • 封装/外壳

    48-TFSOP(0.724,18.40mm 宽)

  • 供应商设备封装

    48-TSOP

  • 包装

    托盘

更新时间:2025-10-22 20:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
CYPRESS/赛普拉斯
25+
QFP
996880
只做原装,欢迎来电资询
CYPRESS/赛普拉斯
24+
515
990000
明嘉莱只做原装正品现货
CYPRESS/赛普拉斯
2450+
QFP
6540
只做原装正品假一赔十为客户做到零风险!!
Cypress
23+
100-LQFP(14x20)
39257
专业分销产品!原装正品!价格优势!
Cypress Semiconductor Corp
21+
256-LBGA
5280
进口原装!长期供应!绝对优势价格(诚信经营
CYPRESS/赛普拉斯
23+
QFP
198589
原厂原装正品现货!!
CYPRESS
NEW
QFP
9526
代理全系列销售, 全新原装正品,价格优势,长期供应,量大可订
CYRESS
2138+
BGA
8960
专营BGA,QFP原装现货,假一赔十
CYPRES
25+
QFP
4500
全新原装、诚信经营、公司现货销售!
CY
24+
QFP
50

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