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CY7C1352价格

参考价格：￥34.1996

型号：CY7C1352G-133AXC 品牌：Cynergy 3 备注：这里有CY7C1352多少钱，2025年最近7天走势，今日出价，今日竞价，CY7C1352批发/采购报价，CY7C1352行情走势销售排行榜，CY7C1352报价。

型号	功能描述	生产厂家企业	LOGO
CY7C1352	256K x18 Pipelined SRAM with NoBL Architecture Functional Description The CY7C1352 is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352 is equipped with the advanced No Bus Latency™ (NoBL™) logic required to e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352	256K x18 Pipelined SRAM with NoBL Architecture	Infineon 英飞凌	Infineon
CY7C1352-100AC	256K x18 Pipelined SRAM with NoBL Architecture Functional Description The CY7C1352 is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352 is equipped with the advanced No Bus Latency™ (NoBL™) logic required to e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352-133AC	256K x18 Pipelined SRAM with NoBL Architecture Functional Description The CY7C1352 is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352 is equipped with the advanced No Bus Latency™ (NoBL™) logic required to e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352-143AC	256K x18 Pipelined SRAM with NoBL Architecture Functional Description The CY7C1352 is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352 is equipped with the advanced No Bus Latency™ (NoBL™) logic required to e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352-80AC	256K x18 Pipelined SRAM with NoBL Architecture Functional Description The CY7C1352 is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352 is equipped with the advanced No Bus Latency™ (NoBL™) logic required to e	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352B	256K x 18 Pipilined SRAm with NoBL Architecture Functional Description The CY7C1352B is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352B is equipped with the advanced No Bus Latency™ (NoBL™) logic required to	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352B-100AC	256K x 18 Pipilined SRAm with NoBL Architecture Functional Description The CY7C1352B is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352B is equipped with the advanced No Bus Latency™ (NoBL™) logic required to	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352B-133AC	256K x 18 Pipilined SRAm with NoBL Architecture Functional Description The CY7C1352B is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352B is equipped with the advanced No Bus Latency™ (NoBL™) logic required to	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352B-143AC	256K x 18 Pipilined SRAm with NoBL Architecture Functional Description The CY7C1352B is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352B is equipped with the advanced No Bus Latency™ (NoBL™) logic required to	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352B-150AC	256K x 18 Pipilined SRAm with NoBL Architecture Functional Description The CY7C1352B is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352B is equipped with the advanced No Bus Latency™ (NoBL™) logic required to	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352B-166AC	256K x 18 Pipilined SRAm with NoBL Architecture Functional Description The CY7C1352B is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352B is equipped with the advanced No Bus Latency™ (NoBL™) logic required to	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352B-80AC	256K x 18 Pipilined SRAm with NoBL Architecture Functional Description The CY7C1352B is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352B is equipped with the advanced No Bus Latency™ (NoBL™) logic required to	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F	4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture Functional Description[1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F-100AC	4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture Functional Description[1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F-100AI	4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture Functional Description[1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F-133AC	4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture Functional Description[1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F-133AI	4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture Functional Description[1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F-166AC	4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture Functional Description[1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F-166AI	4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture Functional Description[1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F-200AC	4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture Functional Description[1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F-200AI	4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture Functional Description[1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F-225AC	4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture Functional Description[1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F-225AI	4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture Functional Description[1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F-250AC	4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture Functional Description[1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F-250AI	4-Mbit (256Kx18) Pipelined SRAM with NoBL??Architecture Functional Description[1] The CY7C1352F is a 3.3V, 256K x 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1352F is equipped with the advanced No Bus Latency™ (NoBL™) logic required	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G	4-Mbit (256Kx18) Pipelined SRAM with NoBL Architecture 4-Mbit (256K x 18) Pipelined SRAM with NoBL™ Architecture Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability • 256K x 18 common I/O architecture • 3.3V core power supp	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-133AXC	4-Mbit (256Kx18) Pipelined SRAM with NoBL Architecture 4-Mbit (256K x 18) Pipelined SRAM with NoBL™ Architecture Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability • 256K x 18 common I/O architecture • 3.3V core power supp	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-133AXI	4-Mbit (256Kx18) Pipelined SRAM with NoBL Architecture 4-Mbit (256K x 18) Pipelined SRAM with NoBL™ Architecture Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability • 256K x 18 common I/O architecture • 3.3V core power supp	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-166AXC	4-Mbit (256Kx18) Pipelined SRAM with NoBL Architecture 4-Mbit (256K x 18) Pipelined SRAM with NoBL™ Architecture Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability • 256K x 18 common I/O architecture • 3.3V core power supp	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-166AXI	4-Mbit (256Kx18) Pipelined SRAM with NoBL Architecture 4-Mbit (256K x 18) Pipelined SRAM with NoBL™ Architecture Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability • 256K x 18 common I/O architecture • 3.3V core power supp	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-200AXC	4-Mbit (256Kx18) Pipelined SRAM with NoBL Architecture 4-Mbit (256K x 18) Pipelined SRAM with NoBL™ Architecture Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability • 256K x 18 common I/O architecture • 3.3V core power supp	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-200AXI	4-Mbit (256Kx18) Pipelined SRAM with NoBL Architecture 4-Mbit (256K x 18) Pipelined SRAM with NoBL™ Architecture Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability • 256K x 18 common I/O architecture • 3.3V core power supp	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-250AXC	4-Mbit (256Kx18) Pipelined SRAM with NoBL Architecture 4-Mbit (256K x 18) Pipelined SRAM with NoBL™ Architecture Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability • 256K x 18 common I/O architecture • 3.3V core power supp	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-250AXI	4-Mbit (256Kx18) Pipelined SRAM with NoBL Architecture 4-Mbit (256K x 18) Pipelined SRAM with NoBL™ Architecture Features • Pin compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability • 256K x 18 common I/O architecture • 3.3V core power supp	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352F	4-Mbit (256Kx18) Pipelined SRAM with NoBL™ Architecture	Infineon 英飞凌	Infineon
CY7C1352G_06	4-Mbit (256K x 18) Pipelined SRAM with NoBL??Architecture 文件：330.48 Kbytes Page：12 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G_12	4-Mbit (256 K 횞 18) Pipelined SRAM with NoBL??Architecture 文件：538.12 Kbytes Page：20 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G_13	4-Mbit (256 K x 18) Pipelined SRAM with NoBL??Architecture 文件：555.33 Kbytes Page：21 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-133AXC	封装/外壳：100-LQFP 包装：卷带（TR）描述：IC SRAM 4.5MBIT PARALLEL 100TQFP 集成电路（IC）存储器	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-133AXC	4-Mbit (256K x 18) Pipelined SRAM with NoBL??Architecture 文件：330.48 Kbytes Page：12 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-133AXC	4-Mbit (256 K 횞 18) Pipelined SRAM with NoBL??Architecture 文件：538.12 Kbytes Page：20 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-133AXC	4-Mbit (256 K x 18) Pipelined SRAM with NoBL??Architecture 文件：555.33 Kbytes Page：21 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-133AXCT	封装/外壳：100-LQFP 包装：托盘托盘描述：IC SRAM 4.5MBIT PARALLEL 100TQFP 集成电路（IC）存储器	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-133AXI	4-Mbit (256K x 18) Pipelined SRAM with NoBL??Architecture 文件：330.48 Kbytes Page：12 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-133AXI	IC SRAM 4.5M PARALLEL 100TQFP	Infineon 英飞凌	Infineon
CY7C1352G-166AXC	4-Mbit (256K x 18) Pipelined SRAM with NoBL??Architecture 文件：330.48 Kbytes Page：12 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-166AXI	4-Mbit (256K x 18) Pipelined SRAM with NoBL??Architecture 文件：330.48 Kbytes Page：12 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-200AXC	4-Mbit (256K x 18) Pipelined SRAM with NoBL??Architecture 文件：330.48 Kbytes Page：12 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-200AXI	4-Mbit (256K x 18) Pipelined SRAM with NoBL??Architecture 文件：330.48 Kbytes Page：12 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-250AXC	4-Mbit (256K x 18) Pipelined SRAM with NoBL??Architecture 文件：330.48 Kbytes Page：12 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1352G-250AXI	4-Mbit (256K x 18) Pipelined SRAM with NoBL??Architecture 文件：330.48 Kbytes Page：12 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress

CY7C1352产品属性

类型
描述
型号
CY7C1352
制造商
Cypress Semiconductor

CY7C1352供应商更多...

更新时间：2025-12-17 22:50:00

IC供应商	芯片型号	品牌	批号	封装	库存	备注	价格
上海意淼电子科技有限公司	CY7C1352B-133AC	CYPRESS	23+	QFP	6500	全新原装假一赔十	询价
中天科工半导体（深圳）有限公司	CY7C1352S-133AXC	CYPRESS/赛普拉斯	25+	QFP	12496	CYPRESS/赛普拉斯原装正品CY7C1352S-133AXC即刻询购立享优惠#长期有货	询价
深圳市英卓尔科技有限公司	CY7C1352G-133AXI	CYRREES	20+	QFP	500	样品可出,优势库存欢迎实单	询价
深圳市毅创腾电子科技有限公司	CY7C1352G-133AXI	Cypress	23+	100-TQFP(14x20)	9550	专业分销产品!原装正品!价格优势!	询价
深圳市福田区绿盛电子商行	CY7C1352F-133AC	CYPRESS	2015+	TQFP	19889	一级代理原装现货,特价热卖!	询价
深圳市华康联电子科技有限公司	CY7C1352G-133AXI	CYPRESS/赛普拉斯	23+	QFP-128	98900	原厂原装正品现货!!	询价
深圳市科恒伟业电子有限公司	CY7C1352B-133AC	CYPRESS/赛普拉斯	2450+	QFP	8850	只做原装正品假一赔十为客户做到零风险!!	询价
深圳市宏捷佳电子科技有限公司	CY7C1352B-133AC	CYPRESS	2023+	QFP	50000	原装现货	询价
深圳诚思涵科技有限公司	CY7C1352G-133AXC	CY	18+	QFP	85600	保证进口原装可开17%增值税发票	询价
深圳市华斯顿科技有限公司	CY7C1352B-100AC	CY	25+23+	N/A	23288	绝对原装正品现货,全新深圳原装进口现货	询价

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