CY7C1327价格

参考价格:¥26.3182

型号:CY7C1327G-133AXI 品牌:Cypress 备注:这里有CY7C1327多少钱,2025年最近7天走势,今日出价,今日竞价,CY7C1327批发/采购报价,CY7C1327行情走势销售排行榜,CY7C1327报价。
型号 功能描述 生产厂家 企业 LOGO 操作

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mb (256K x 18) Pipelined Sync SRAM

文件:572.91 Kbytes Page:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mb (256K x 18) Pipelined Sync SRAM

Infineon

英飞凌

4-Mb (256K x 18) Pipelined Sync SRAM

文件:572.91 Kbytes Page:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mb (256K x 18) Pipelined Sync SRAM

文件:572.91 Kbytes Page:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mb (256K x 18) Pipelined Sync SRAM

文件:572.91 Kbytes Page:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mb (256K x 18) Pipelined Sync SRAM

文件:572.91 Kbytes Page:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mb (256K x 18) Pipelined Sync SRAM

文件:572.91 Kbytes Page:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mb (256K x 18) Pipelined Sync SRAM

文件:572.91 Kbytes Page:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mb (256K x 18) Pipelined Sync SRAM

文件:572.91 Kbytes Page:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mb (256K x 18) Pipelined Sync SRAM

文件:572.91 Kbytes Page:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mb (256K x 18) Pipelined Sync SRAM

文件:572.91 Kbytes Page:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mb (256K x 18) Pipelined Sync SRAM

文件:572.91 Kbytes Page:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1327产品属性

  • 类型

    描述

  • 型号

    CY7C1327

  • 制造商

    Cypress Semiconductor

更新时间:2025-10-20 22:59:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
CYPRESS(赛普拉斯)
24+
LQFP100
7350
现货供应,当天可交货!免费送样,原厂技术支持!!!
CYPRESS
20+
TQFP 100
500
样品可出,优势库存欢迎实单
CYP
25+
QFP
4500
百分百原装正品 真实公司现货库存 本公司只做原装 可
CYPRESS
25+23+
QFP
24136
绝对原装正品全新进口深圳现货
CYPRESS
22+
TQFP
8000
原装正品支持实单
Cypress
25+
25000
原厂原包 深圳现货 主打品牌 假一赔百 可开票!
Cypress
23+
100-TQFP(14x14)
73390
专业分销产品!原装正品!价格优势!
Cypress Semiconductor Corp
25+
100-LQFP
9350
独立分销商 公司只做原装 诚心经营 免费试样正品保证
24+
TQFP
6980
原装现货,可开13%税票
CYPRESS
2138+
原厂标准封装
8960
代理CYPRESS全系列芯片,原装现货

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