4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

4-Mbit (256K x 18) Pipelined Sync SRAM

文件：373.23 Kbytes Page：18 Pages

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

4-Mbit (256K x 18) Pipelined Sync SRAM

Features • Registered inputs and outputs for pipelined operation • 256K ×18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5

4-Mbit (256K x 18) Pipelined Sync SRAM

文件：373.23 Kbytes Page：18 Pages

4-Mbit (256 K 횞 18) Pipelined Sync SRAM

文件：762.01 Kbytes Page：22 Pages

4-Mbit (256 K x 18) Pipelined Sync SRAM

文件：779.24 Kbytes Page：23 Pages