2.5V - 2.6V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER

DESCRIPTION: The CSPT857C is a PLL based clock driver that acts as a zero delay buffer to distribute one differential clock input pair(CLK, CLK ) to 10 differential output pairs (Y [0:9],Y [0:9]) and one differential pair of feedback clock output (FBOUT, FBOUT). External feedback pins (FBIN, F

2.5V - 2.6V PLL Differential 1:10 SDRAM Clock Driver

2.5V - 2.6V PLL Differential 1:10 SDRAM Clock Driver

封装/外壳：56-TFBGA 包装：卷带（TR） 描述：IC CLK BUF DDR 220MHZ 1CIRC 集成电路（IC） 应用特定时钟/定时

封装/外壳：40-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC CLK BUF DDR 220MHZ 1CIRC 集成电路（IC） 应用特定时钟/定时

857 Series High Temp Card Edge Connector | Black | 0.156 (3.96mm) Pitch | 0.200 (5.08mm) Row Spacing | Low Profile Insulator

Features 0.156 (3.96mm) Contact Spacing by 0.200 (5.08mm) Row Spacing Accepts .062 (1.57mm) Nominal Thickness P.C. Board Low Profile Insulator Body, 0.473 (12.01mm) Contact Termination Options include P.C. Tail, Wire Hole, Wire Wrap, 90 and Extender Board Bends Single or Dual Row Configuratio

General Purpose Transistor

Features - Low current (max. 100mA). - Low voltage. - AEC-Q101 Qualified.

General Purpose Transistor

Features - For AF input stages and driver applications. - High current gain. - Low collector-emitter saturation voltage. - Low noise between 30Hz and 15kHz. - AEC-Q101 Qualified.

General Purpose Transistor

Features - Low current (max. 100mA). - Low voltage. - AEC-Q101 Qualified.

boxes and ancillary products

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