丝印代码：CM085B；CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

Features: Medium-speed operation — tpyy = 90 ns; tp * 125 ns (typ.) at 10 V . Individual inhibit controls Standardized symmetrical output characteristics 100% tested for quiescent current at 20 V 8 Maximum input current of 1 uA at 18 V over full package- temperature range; 100 nA at

丝印代码：CM085B；CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

Features: Medium-speed operation — tpyy = 90 ns; tp * 125 ns (typ.) at 10 V . Individual inhibit controls Standardized symmetrical output characteristics 100% tested for quiescent current at 20 V 8 Maximum input current of 1 uA at 18 V over full package- temperature range; 100 nA at

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