1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

Low Output Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and CMOS-Compatible Outputs Distributes One Clock Input to Six Clock Outputs Polarity Control Selects True or Complementary Outputs Distributed VCC and GND Pins Reduce Switching Noise High-Driv

1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

文件：105.44 Kbytes Page：7 Pages

1Line to 6Line Clock Driver

文件：299.31 Kbytes Page：10 Pages

具有可选择极性的 1 至 6 CMOS 时钟驱动器

1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

Low Output Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and CMOS-Compatible Outputs Distributes One Clock Input to Six Clock Outputs Polarity Control Selects True or Complementary Outputs Distributed VCC and GND Pins Reduce Switching Noise High-Driv

1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

Low Output Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and CMOS-Compatible Outputs Distributes One Clock Input to Six Clock Outputs Polarity Control Selects True or Complementary Outputs Distributed VCC and GND Pins Reduce Switching Noise High-Driv

1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

Low Output Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and CMOS-Compatible Outputs Distributes One Clock Input to Six Clock Outputs Polarity Control Selects True or Complementary Outputs Distributed VCC and GND Pins Reduce Switching Noise High-Driv

1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

Low Output Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and CMOS-Compatible Outputs Distributes One Clock Input to Six Clock Outputs Polarity Control Selects True or Complementary Outputs Distributed VCC and GND Pins Reduce Switching Noise High-Driv

1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

Low Output Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and CMOS-Compatible Outputs Distributes One Clock Input to Six Clock Outputs Polarity Control Selects True or Complementary Outputs Distributed VCC and GND Pins Reduce Switching Noise High-Driv

1Line to 6Line Clock Driver

文件：299.31 Kbytes Page：10 Pages

1Line to 6Line Clock Driver

文件：299.31 Kbytes Page：10 Pages

1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

文件：105.44 Kbytes Page：7 Pages

1Line to 6Line Clock Driver

文件：299.31 Kbytes Page：10 Pages

1Line to 6Line Clock Driver

文件：299.31 Kbytes Page：10 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC CLK BUFFER 1:6 80MHZ 16SOIC 集成电路（IC） 时钟缓冲器，驱动器

1Line to 6Line Clock Driver

文件：299.31 Kbytes Page：10 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC CLK BUFFER 1:6 80MHZ 16SOIC 集成电路（IC） 时钟缓冲器，驱动器

1Line to 6Line Clock Driver

文件：299.31 Kbytes Page：10 Pages

TLV803E, TLV809E, TLV810E Low Power 250-nA IQ and Small Size Supply Voltage Supervisors

1 Features • Ensured RESET/RESET for VDD = 0.7 V to 6 V • Fixed time delay: 40 μs, 10 ms, 50 ms, 100 ms, 200 ms, 400 ms • Supply current (IDD): 250 nA (typical) – 1 μA (maximum for VDD = 3.3 V) • Output topology: – TLV809E: push-pull, active-low – TLV803E: open-drain, active-low – TLV810E

Wiha ComfortGrip Pliers

文件：199.71 Kbytes Page：1 Pages

Socket terminal strip Screw connection

文件：91.46 Kbytes Page：1 Pages

INTERCONNECTS 2,54 Grid Solder Cup Headers and Sockets Single and Double Row

文件：211.04 Kbytes Page：1 Pages

Compliant with European standards European standards power relays

文件：76.62 Kbytes Page：4 Pages