HIGH-SPEED CMOS LOGIC OCTAL D-TYPE FLIP-FLOP 3-STATE, POSITIVE-EDGE TRIGGERED

Controlled Baseline − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −40°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product Change Notification Qualification Pedigree† Buffered Inputs Common 3-State Output-Enable Control

HIGH-SPEED CMOS LOGIC OCTAL D-TYPE FLIP-FLOP 3-STATE, POSITIVE-EDGE TRIGGERED

Qualified for Automotive Applications Buffered Inputs Common 3-State Output-Enable Control 3-State Outputs Bus-Line Driving Capability Typical Propagation Delay (Clock to Q): 15 ns at VCC = 5 V, CL = 15 pF, TA = 25
C Fanout (Over Temperature Range) Standard Outputs . . . 10 LSTTL Loads Bu

增强型产品高速 Cmos 逻辑八路正边沿触发式 D 型触发器，具有

HIGH-SPEED CMOS LOGIC OCTAL D-TYPE FLIP-FLOP 3-STATE,POSITIVE-EDGE TRIGGERED

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Octal D-type flip-flop; positive edge-trigger; 3-state

1. General description The 74HC574; 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirement

Octal D-type flip-flop; positive edge-trigger; 3-state

GENERAL DESCRIPTION The 74HC/HCT574 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state non-inverting outputs for bus oriented applications • 8-bit positive edge-triggere

Octal D-type flip-flop; positive edge-trigger; 3-state

GENERAL DESCRIPTION The 74HC/HCT574 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state non-inverting outputs for bus oriented applications • 8-bit positive edge-triggere

Octal D-type flip-flop; positive edge-trigger; 3-state

1. General description The 74HC574; 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirement

Octal D-type flip-flop; positive edge-trigger; 3-state

GENERAL DESCRIPTION The 74HC/HCT574 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state non-inverting outputs for bus oriented applications • 8-bit positive edge-triggere