CDx4HCT27 Triple 3-Input NOR Gates

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

具有 TTL 兼容型 CMOS 输入的 3 通道、3 输入、4.5V 至 5.5V 或非门

This device contains three independent 3-input NOR gates. Each gate performs the Boolean function Y =  A + B + C in positive logic. • LSTTL input logic compatible \n• CMOS input logic compatible \n• Buffered inputs\n• Wide operating temperature range: -55°C to +125°C\n• Significant power reduction compared to LSTTL logic ICs;

High Speed CMOS Logic Triple 3-Input NOR Gate

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High-Speed CMOS Logic Triple 3-Input NOR Gate

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High-Speed CMOS Logic Triple 3-Input NOR Gate

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丝印代码：CD74HCT273E；CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

丝印代码：CD74HCT273E；CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

丝印代码：CD74HCT273E；CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

丝印代码：CD74HCT27E；CDx4HCT27 Triple 3-Input NOR Gates

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

丝印代码：CD74HCT27E；CDx4HCT27 Triple 3-Input NOR Gates

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

具有复位功能的高速 CMOS 逻辑八路 D 型触发器

The ’HC273 and ’HCT273 high speed octal D-Type flip-flops with a direct clear input are manufactured with silicon-gate CMOS technology. They possess the low power consumption of standard CMOS integrated circuits.\n\n Information at the D inputis transferred to the Q outputs on the positive-going edg • Common Clock and Asynchronous Master Reset\n• Buffered Inputs\n• Standard Outputs...10 LSTTL Loads\n• Wide Operating Temperature Range...–55°C to 125°C\n• Significant Power Reduction Compared to LSTTL Logic ICs\n• 2V to 6V Operation\n• HCT Types \n• Direct LSTTL Input Logic Compatibility, VIL = 0.;

丝印代码：HCT273M；CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

丝印代码：HCT273M；CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

丝印代码：HCT273M；CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

CDx4HCT27 Triple 3-Input NOR Gates

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

CDx4HCT27 Triple 3-Input NOR Gates

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

CDx4HCT27 Triple 3-Input NOR Gates

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

High Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：54.99 Kbytes Page：8 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：295.01 Kbytes Page：7 Pages

High Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：54.99 Kbytes Page：8 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：295.01 Kbytes Page：7 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：858.7 Kbytes Page：18 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：858.7 Kbytes Page：18 Pages

封装/外壳：20-DIP（0.300"，7.62mm） 功能：主复位 包装：卷带（TR） 描述：IC FF D-TYPE SNGL 8BIT 20DIP 集成电路（IC） 触发器

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 功能：主复位 包装：管件 描述：IC FF D-TYPE SNGL 8BIT 20SOIC 集成电路（IC） 触发器

High Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：54.99 Kbytes Page：8 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：295.01 Kbytes Page：7 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：858.7 Kbytes Page：18 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：858.7 Kbytes Page：18 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：295.01 Kbytes Page：7 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：858.7 Kbytes Page：18 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：612.77 Kbytes Page：14 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：261.67 Kbytes Page：11 Pages

High Speed CMOS Logic Triple 3-Input NOR Gate

文件：43.78 Kbytes Page：7 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：265.95 Kbytes Page：10 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：261.67 Kbytes Page：11 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：261.67 Kbytes Page：11 Pages

High Speed CMOS Logic Triple 3-Input NOR Gate

文件：43.78 Kbytes Page：7 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：265.95 Kbytes Page：10 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：612.77 Kbytes Page：14 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：612.77 Kbytes Page：14 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：265.95 Kbytes Page：10 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：261.67 Kbytes Page：11 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：261.67 Kbytes Page：11 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：261.67 Kbytes Page：11 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：261.67 Kbytes Page：11 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：265.95 Kbytes Page：10 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：612.77 Kbytes Page：14 Pages

High-Speed CMOS Logic Triple 3-Input NOR Gate

文件：261.67 Kbytes Page：11 Pages

Triple 3-input NOR gate

GENERAL DESCRIPTION The 74HC/HCT27 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT27 provide the 3-input NOR function. FEATURES • Output capability: standard • ICC categor

TRIPLE 3-INPUT NOR GATE

DESCRIPTION The M54/74HCT27 is a high speed CMOS TRIPLE 3-INPUT NOR GATE fabricated in silicon gate C2MOS technology. ■ HIGH SPEED tPD = 9 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C ■ COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) ■ OUTPUT DRI

TRIPLE 3-INPUT NOR GATE

DESCRIPTION The M54/74HCT27 is a high speed CMOS TRIPLE 3-INPUT NOR GATE fabricated in silicon gate C2MOS technology. ■ HIGH SPEED tPD = 9 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C ■ COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) ■ OUTPUT DRI

TRIPLE 3-INPUT NOR GATE

DESCRIPTION The M54/74HCT27 is a high speed CMOS TRIPLE 3-INPUT NOR GATE fabricated in silicon gate C2MOS technology. ■ HIGH SPEED tPD = 9 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C ■ COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) ■ OUTPUT DRI