High-Speed CMOS Logic Dual 4-Input Multiplexer

Features • Common Select Inputs • Separate Output-Enable Inputs • Three-State Outputs • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55o

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC MULTIPLEXER 2 X 4:1 16SOIC 集成电路（IC） 信号开关，多路复用器，解码器

High-Speed CMOS Logic Dual 4-Input Multiplexer

文件：388.87 Kbytes Page：14 Pages

High-Speed CMOS Logic Dual 4-Input Multiplexer

文件：397.12 Kbytes Page：14 Pages

High-Speed CMOS Logic Dual 4-Input Multiplexer

Features • Common Select Inputs • Separate Output-Enable Inputs • Three-State Outputs • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55o

High-Speed CMOS Logic Dual 4-Input Multiplexer

文件：397.12 Kbytes Page：14 Pages

High-Speed CMOS Logic Dual 4-Input Multiplexer

文件：388.87 Kbytes Page：14 Pages

High-Speed CMOS Logic Dual 4-Input Multiplexer

文件：397.12 Kbytes Page：14 Pages

High-Speed CMOS Logic Dual 4-Input Multiplexer

文件：388.87 Kbytes Page：14 Pages

Dual 4-input multiplexer; 3-state

GENERAL DESCRIPTION The 74HC/HCT253 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • 3-state outputs for bus interface • and multiplex e

Dual 4-input multiplexer; 3-state

Dual 4-input multiplexer; 3-state

1. General description The 74HC253; 74HCT253 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on nOE cause

Dual 4-input multiplexer; 3-state

1. General description The 74HC253; 74HCT253 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on nOE cause

Dual 4-input multiplexer; 3-state

GENERAL DESCRIPTION The 74HC/HCT253 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • 3-state outputs for bus interface • and multiplex e