Dual 4-input multiplexer; 3-state

GENERAL DESCRIPTION The 74HC/HCT253 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • 3-state outputs for bus interface • and multiplex e

Dual 4-input multiplexer; 3-state

Dual 4-input multiplexer; 3-state

1. General description The 74HC253; 74HCT253 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on nOE cause

Dual 4-input multiplexer; 3-state

1. General description The 74HC253; 74HCT253 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on nOE cause

Dual 4-input multiplexer; 3-state

1. General description The 74HC253-Q100; 74HCT253-Q100 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on

Dual 4-input multiplexer; 3-state

The 74HC253-Q100; 74HCT253-Q100 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on nOE causes the outputs to a • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Non-inverting data path\n• 3-state outputs interface directly with system bus\n• Common select inputs\n• Separate output enable inputs\n• Wide supply voltage rang;

Dual 4-input multiplexer; 3-state

The 74HC253; 74HCT253 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on nOE causes the outputs to assume a hi • Non-inverting data path\n• 3-state outputs interface directly with system bus\n• Complies with JEDEC standard no. 7A\n• Common select inputs\n• Separate output enable inputs\n• Input levels:• For 74HC253: CMOS level\n• For 74HCT253: TTL level\n\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n;

Dual 4-input multiplexer; 3-state

1. General description The 74HC253; 74HCT253 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on nOE cause

Dual 4-input multiplexer; 3-state

Dual 4-input multiplexer; 3-state

GENERAL DESCRIPTION The 74HC/HCT253 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • 3-state outputs for bus interface • and multiplex e

Dual 4-input multiplexer; 3-state

GENERAL DESCRIPTION The 74HC/HCT253 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • 3-state outputs for bus interface • and multiplex e

Dual 4-input multiplexer; 3-state

Dual 4-input multiplexer; 3-state

The 74HC253; 74HCT253 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on nOE causes the outputs to assume a hi • Non-inverting data path\n• 3-state outputs interface directly with system bus\n• Complies with JEDEC standard no. 7A\n• Common select inputs\n• Separate output enable inputs\n• Input levels:• For 74HC253: CMOS level\n• For 74HCT253: TTL level\n\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n;

Dual 4-input multiplexer; 3-state

1. General description The 74HC253-Q100; 74HCT253-Q100 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on

Dual 4-input multiplexer; 3-state

Dual 4-input multiplexer; 3-state

GENERAL DESCRIPTION The 74HC/HCT253 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • 3-state outputs for bus interface • and multiplex e

Dual 4-input multiplexer; 3-state

GENERAL DESCRIPTION The 74HC/HCT253 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • 3-state outputs for bus interface • and multiplex e

Dual 4-input multiplexer; 3-state

1. General description The 74HC253; 74HCT253 is a dual 4-bit multiplexer, each with four binary inputs (nI0 to nI3), an output enable input (nOE) and shared select inputs (S0 and S1). One of the four binary inputs is selected by the select inputs and routed to the output nY. A HIGH on nOE cause

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC MULTIPLEXER 2 X 4:1 16SO 集成电路（IC） 信号开关，多路复用器，解码器

封装/外壳：16-SSOP（0.209"，5.30mm 宽） 包装：管件 描述：IC MULTIPLEXER 2 X 4:1 16SSOP 集成电路（IC） 信号开关，多路复用器，解码器

Dual 4-input multiplexer; 3-state

文件：749.33 Kbytes Page：15 Pages

Dual 4-input multiplexer; 3-state

文件：749.33 Kbytes Page：15 Pages